{"id":813125,"url":"http://patchwork.ozlabs.org/api/patches/813125/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/patch/1505268351-31941-3-git-send-email-yamada.masahiro@socionext.com/","project":{"id":3,"url":"http://patchwork.ozlabs.org/api/projects/3/?format=json","name":"Linux MTD development","link_name":"linux-mtd","list_id":"linux-mtd.lists.infradead.org","list_email":"linux-mtd@lists.infradead.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505268351-31941-3-git-send-email-yamada.masahiro@socionext.com>","list_archive_url":null,"date":"2017-09-13T02:05:51","name":"[v2,2/2] mtd: nand: denali: support two row address cycle devices","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"ff238489c806de20d54725419ce15536a037ede9","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/?format=json","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"delegate":{"id":58324,"url":"http://patchwork.ozlabs.org/api/users/58324/?format=json","username":"bbrezillon","first_name":"Boris","last_name":"Brezillon","email":"boris.brezillon@free-electrons.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-mtd/patch/1505268351-31941-3-git-send-email-yamada.masahiro@socionext.com/mbox/","series":[{"id":2796,"url":"http://patchwork.ozlabs.org/api/series/2796/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/list/?series=2796","date":"2017-09-13T02:05:49","name":"mtd: nand: introduce NAND_ROW_ADDR_3 flag and improve Denali driver","version":2,"mbox":"http://patchwork.ozlabs.org/series/2796/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/813125/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/813125/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1505268359;\n\tbh=Pp8ErW7A0jElDfN2Cy6eG5afu4VeTVMOkbyQ9DH3wfk=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=rRliQ1bMEYQYkJ1/5KkTlbAPsqhoNGXa4rqftuGfY3if0Dn5sAqLxrfq2Vq91p6FH\n\trtmyEPRPoA4LwIxhg6lJ9aXjq3xvKIOQEElYkT9ZePjr9n0frHFkb6jNrWQc7Kkp8n\n\tBhi195ul72ehEy+cj5V53Yx29tSN2RdUu/Fc2nhGmPynjNVshXmGBvp46LywJQtKpZ\n\tKI47x9t1CS5iskkpBku8lN7UD0nda3Rlc5b6Cn93qfoGrrMbqaQveGEQOnzsxKbQYD\n\tZSSQa//oAxqVHmLm+uZ7ZEtJtRvr8/03f5dqj0fppo2D7nhsKRzJ0Mbh/cZMcVhsQ5\n\tIODupE4VOIbWA=="],"DKIM-Filter":"OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v8D25uqB022945","X-Nifty-SrcIP":"[153.142.97.92]","From":"Masahiro Yamada <yamada.masahiro@socionext.com>","To":"linux-mtd@lists.infradead.org","Subject":"[PATCH v2 2/2] mtd: nand: denali: support two row address cycle\n\tdevices","Date":"Wed, 13 Sep 2017 11:05:51 +0900","Message-Id":"<1505268351-31941-3-git-send-email-yamada.masahiro@socionext.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1505268351-31941-1-git-send-email-yamada.masahiro@socionext.com>","References":"<1505268351-31941-1-git-send-email-yamada.masahiro@socionext.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170912_190653_483883_4484712E ","X-CRM114-Status":"GOOD (  10.06  )","X-Spam-Score":"-1.2 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-1.2 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.7 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail)\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-mtd>,\n\t<mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-mtd/>","List-Post":"<mailto:linux-mtd@lists.infradead.org>","List-Help":"<mailto:linux-mtd-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-mtd>,\n\t<mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>","Cc":"Boris Brezillon <boris.brezillon@free-electrons.com>,\n\tMarek Vasut <marek.vasut@gmail.com>,\n\tRichard Weinberger <richard@nod.at>, linux-kernel@vger.kernel.org,\n\tMasahiro Yamada <yamada.masahiro@socionext.com>, \n\tCyrille Pitchen <cyrille.pitchen@wedev4u.fr>,\n\tBrian Norris <computersforpeace@gmail.com>,\n\tDavid Woodhouse <dwmw2@infradead.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" <linux-mtd-bounces@lists.infradead.org>","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"The register TWO_ROW_ADDR_CYCLES specifies the number of row address\ncycles of the device, but it is fixed to 0 in the driver init code\n(i.e. always 3 row address cycles).\n\nReflect the result of nand_scan_ident() to the register setting\nin order to support 2 row address cycle devices.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\n---\n\nChanges in v2: None\n\n drivers/mtd/nand/denali.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c\nindex 3087b0b..aefdc83 100644\n--- a/drivers/mtd/nand/denali.c\n+++ b/drivers/mtd/nand/denali.c\n@@ -1137,8 +1137,6 @@ static void denali_hw_init(struct denali_nand_info *denali)\n \n \tiowrite32(0xffff, denali->reg + SPARE_AREA_MARKER);\n \n-\t/* Should set value for these registers when init */\n-\tiowrite32(0, denali->reg + TWO_ROW_ADDR_CYCLES);\n \tiowrite32(1, denali->reg + ECC_ENABLE);\n }\n \n@@ -1379,6 +1377,8 @@ int denali_init(struct denali_nand_info *denali)\n \t\t  denali->reg + PAGES_PER_BLOCK);\n \tiowrite32(chip->options & NAND_BUSWIDTH_16 ? 1 : 0,\n \t\t  denali->reg + DEVICE_WIDTH);\n+\tiowrite32(chip->options & NAND_ROW_ADDR_3 ? 0 : TWO_ROW_ADDR_CYCLES__FLAG,\n+\t\t  denali->reg + TWO_ROW_ADDR_CYCLES);\n \tiowrite32(mtd->writesize, denali->reg + DEVICE_MAIN_AREA_SIZE);\n \tiowrite32(mtd->oobsize, denali->reg + DEVICE_SPARE_AREA_SIZE);\n \n","prefixes":["v2","2/2"]}