{"id":813071,"url":"http://patchwork.ozlabs.org/api/patches/813071/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170912210151.12213-1-marek.vasut+renesas@gmail.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170912210151.12213-1-marek.vasut+renesas@gmail.com>","list_archive_url":null,"date":"2017-09-12T21:01:51","name":"[U-Boot] ARM: dts: rmobile: Update DTS to match Linux 4.13","commit_ref":"37a7908137a8c904f43c83f3e6c269cd51bf6126","pull_url":null,"state":"accepted","archived":true,"hash":"236b00ceb53cad9e07573facdc0578a91f1c8737","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/?format=json","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"delegate":{"id":1750,"url":"http://patchwork.ozlabs.org/api/users/1750/?format=json","username":"iwamatsu","first_name":"Nobuhiro","last_name":"Iwamatsu","email":"iwamatsu@nigauri.org"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170912210151.12213-1-marek.vasut+renesas@gmail.com/mbox/","series":[{"id":2774,"url":"http://patchwork.ozlabs.org/api/series/2774/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=2774","date":"2017-09-12T21:01:51","name":"[U-Boot] ARM: dts: rmobile: Update DTS to match Linux 4.13","version":1,"mbox":"http://patchwork.ozlabs.org/series/2774/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/813071/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/813071/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.13,\ncommit 569dbb88e80deb68974ef6fdd6a13edb9d686261 . This includes both M3\nand H3 ULCB and Salvator-X boards.\n\nSigned-off-by: Marek Vasut \nCc: Nobuhiro Iwamatsu \n---\n arch/arm/dts/r8a7795-h3ulcb.dts | 342 +-------------------\n arch/arm/dts/r8a7795-salvator-x.dts | 565 +++-----------------------------\n arch/arm/dts/r8a7795.dtsi | 133 ++++----\n arch/arm/dts/r8a7796-m3ulcb.dts | 168 +---------\n arch/arm/dts/r8a7796-salvator-x.dts | 244 +-------------\n arch/arm/dts/r8a7796.dtsi | 421 ++++++++++++++++++++++++\n arch/arm/dts/salvator-common.dtsi | 629 ++++++++++++++++++++++++++++++++++++\n arch/arm/dts/salvator-x.dtsi | 30 ++\n arch/arm/dts/ulcb.dtsi | 367 +++++++++++++++++++++\n 9 files changed, 1572 insertions(+), 1327 deletions(-)\n create mode 100644 arch/arm/dts/salvator-common.dtsi\n create mode 100644 arch/arm/dts/salvator-x.dtsi\n create mode 100644 arch/arm/dts/ulcb.dtsi","diff":"diff --git a/arch/arm/dts/r8a7795-h3ulcb.dts b/arch/arm/dts/r8a7795-h3ulcb.dts\nindex ab352159de..0426f41765 100644\n--- a/arch/arm/dts/r8a7795-h3ulcb.dts\n+++ b/arch/arm/dts/r8a7795-h3ulcb.dts\n@@ -9,24 +9,16 @@\n * kind, whether express or implied.\n */\n \n+#define CPG_AUDIO_CLK_I\t\tR8A7795_CLK_S0D4\n+\n /dts-v1/;\n #include \"r8a7795.dtsi\"\n-#include \n-#include \n+#include \"ulcb.dtsi\"\n \n / {\n-\tmodel = \"Renesas H3ULCB board based on r8a7795\";\n+\tmodel = \"Renesas H3ULCB board based on r8a7795 ES2.0+\";\n \tcompatible = \"renesas,h3ulcb\", \"renesas,r8a7795\";\n \n-\taliases {\n-\t\tserial0 = &scif2;\n-\t\tethernet0 = &avb;\n-\t};\n-\n-\tchosen {\n-\t\tstdout-path = \"serial0:115200n8\";\n-\t};\n-\n \tmemory@48000000 {\n \t\tdevice_type = \"memory\";\n \t\t/* first 128MB is reserved for secure area. */\n@@ -47,330 +39,4 @@\n \t\tdevice_type = \"memory\";\n \t\treg = <0x7 0x00000000 0x0 0x40000000>;\n \t};\n-\n-\tleds {\n-\t\tcompatible = \"gpio-leds\";\n-\n-\t\tled5 {\n-\t\t\tgpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;\n-\t\t};\n-\t\tled6 {\n-\t\t\tgpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;\n-\t\t};\n-\t};\n-\n-\tkeyboard {\n-\t\tcompatible = \"gpio-keys\";\n-\n-\t\tkey-1 {\n-\t\t\tlinux,code = ;\n-\t\t\tlabel = \"SW3\";\n-\t\t\twakeup-source;\n-\t\t\tdebounce-interval = <20>;\n-\t\t\tgpios = <&gpio6 11 GPIO_ACTIVE_LOW>;\n-\t\t};\n-\t};\n-\n-\tx12_clk: x12 {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <24576000>;\n-\t};\n-\n-\treg_1p8v: regulator0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-1.8V\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\treg_3p3v: regulator1 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-3.3V\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\tvcc_sdhi0: regulator-vcc-sdhi0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"SDHI0 Vcc\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tvccq_sdhi0: regulator-vccq-sdhi0 {\n-\t\tcompatible = \"regulator-gpio\";\n-\n-\t\tregulator-name = \"SDHI0 VccQ\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;\n-\t\tgpios-states = <1>;\n-\t\tstates = <3300000 1\n-\t\t\t 1800000 0>;\n-\t};\n-\n-\taudio_clkout: audio-clkout {\n-\t\t/*\n-\t\t * This is same as <&rcar_sound 0>\n-\t\t * but needed to avoid cs2000/rcar_sound probe dead-lock\n-\t\t */\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <11289600>;\n-\t};\n-\n-\trsnd_ak4613: sound {\n-\t\tcompatible = \"simple-audio-card\";\n-\n-\t\tsimple-audio-card,format = \"left_j\";\n-\t\tsimple-audio-card,bitclock-master = <&sndcpu>;\n-\t\tsimple-audio-card,frame-master = <&sndcpu>;\n-\n-\t\tsndcpu: simple-audio-card,cpu {\n-\t\t\tsound-dai = <&rcar_sound>;\n-\t\t};\n-\n-\t\tsndcodec: simple-audio-card,codec {\n-\t\t\tsound-dai = <&ak4613>;\n-\t\t};\n-\t};\n-};\n-\n-&extal_clk {\n-\tclock-frequency = <16666666>;\n-};\n-\n-&extalr_clk {\n-\tclock-frequency = <32768>;\n-};\n-\n-&pfc {\n-\tpinctrl-0 = <&scif_clk_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tscif2_pins: scif2 {\n-\t\tgroups = \"scif2_data_a\";\n-\t\tfunction = \"scif2\";\n-\t};\n-\n-\tscif_clk_pins: scif_clk {\n-\t\tgroups = \"scif_clk_a\";\n-\t\tfunction = \"scif_clk\";\n-\t};\n-\n-\ti2c2_pins: i2c2 {\n-\t\tgroups = \"i2c2_a\";\n-\t\tfunction = \"i2c2\";\n-\t};\n-\n-\tavb_pins: avb {\n-\t\tgroups = \"avb_mdc\";\n-\t\tfunction = \"avb\";\n-\t};\n-\n-\tsdhi0_pins: sd0 {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi0_pins_uhs: sd0_uhs {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsdhi2_pins: sd2 {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi2_pins_uhs: sd2_uhs {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsound_pins: sound {\n-\t\tgroups = \"ssi01239_ctrl\", \"ssi0_data\", \"ssi1_data_a\";\n-\t\tfunction = \"ssi\";\n-\t};\n-\n-\tsound_clk_pins: sound-clk {\n-\t\tgroups = \"audio_clk_a_a\", \"audio_clk_b_a\", \"audio_clk_c_a\",\n-\t\t\t \"audio_clkout_a\", \"audio_clkout3_a\";\n-\t\tfunction = \"audio_clk\";\n-\t};\n-\n-\tusb1_pins: usb1 {\n-\t\tgroups = \"usb1\";\n-\t\tfunction = \"usb1\";\n-\t};\n-};\n-\n-&scif2 {\n-\tpinctrl-0 = <&scif2_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-};\n-\n-&scif_clk {\n-\tclock-frequency = <14745600>;\n-};\n-\n-&i2c2 {\n-\tpinctrl-0 = <&i2c2_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-\n-\tclock-frequency = <100000>;\n-\n-\tak4613: codec@10 {\n-\t\tcompatible = \"asahi-kasei,ak4613\";\n-\t\t#sound-dai-cells = <0>;\n-\t\treg = <0x10>;\n-\t\tclocks = <&rcar_sound 3>;\n-\n-\t\tasahi-kasei,in1-single-end;\n-\t\tasahi-kasei,in2-single-end;\n-\t\tasahi-kasei,out1-single-end;\n-\t\tasahi-kasei,out2-single-end;\n-\t\tasahi-kasei,out3-single-end;\n-\t\tasahi-kasei,out4-single-end;\n-\t\tasahi-kasei,out5-single-end;\n-\t\tasahi-kasei,out6-single-end;\n-\t};\n-\n-\tcs2000: clk-multiplier@4f {\n-\t\t#clock-cells = <0>;\n-\t\tcompatible = \"cirrus,cs2000-cp\";\n-\t\treg = <0x4f>;\n-\t\tclocks = <&audio_clkout>, <&x12_clk>;\n-\t\tclock-names = \"clk_in\", \"ref_clk\";\n-\n-\t\tassigned-clocks = <&cs2000>;\n-\t\tassigned-clock-rates = <24576000>; /* 1/1 divide */\n-\t};\n-};\n-\n-&rcar_sound {\n-\tpinctrl-0 = <&sound_pins &sound_clk_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\t/* Single DAI */\n-\t#sound-dai-cells = <0>;\n-\n-\t/* audio_clkout0/1/2/3 */\n-\t#clock-cells = <1>;\n-\tclock-frequency = <11289600>;\n-\n-\tstatus = \"okay\";\n-\n-\t/* update to */\n-\tclocks = <&cpg CPG_MOD 1005>,\n-\t\t <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,\n-\t\t <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,\n-\t\t <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,\n-\t\t <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,\n-\t\t <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,\n-\t\t <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,\n-\t\t <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,\n-\t\t <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,\n-\t\t <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,\n-\t\t <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,\n-\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n-\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n-\t\t <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,\n-\t\t <&audio_clk_a>, <&cs2000>,\n-\t\t <&audio_clk_c>,\n-\t\t <&cpg CPG_CORE R8A7795_CLK_S0D4>;\n-\n-\trcar_sound,dai {\n-\t\tdai0 {\n-\t\t\tplayback = <&ssi0 &src0 &dvc0>;\n-\t\t\tcapture = <&ssi1 &src1 &dvc1>;\n-\t\t};\n-\t};\n-};\n-\n-&sdhi0 {\n-\tpinctrl-0 = <&sdhi0_pins>;\n-\tpinctrl-1 = <&sdhi0_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <&vcc_sdhi0>;\n-\tvqmmc-supply = <&vccq_sdhi0>;\n-\tcd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;\n-\tbus-width = <4>;\n-\tsd-uhs-sdr50;\n-\tstatus = \"okay\";\n-};\n-\n-&sdhi2 {\n-\t/* used for on-board 8bit eMMC */\n-\tpinctrl-0 = <&sdhi2_pins>;\n-\tpinctrl-1 = <&sdhi2_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <®_3p3v>;\n-\tvqmmc-supply = <®_1p8v>;\n-\tbus-width = <8>;\n-\tnon-removable;\n-\tstatus = \"okay\";\n-};\n-\n-&ssi1 {\n-\tshared-pin;\n-};\n-\n-&wdt0 {\n-\ttimeout-sec = <60>;\n-\tstatus = \"okay\";\n-};\n-\n-&audio_clk_a {\n-\tclock-frequency = <22579200>;\n-};\n-\n-&avb {\n-\tpinctrl-0 = <&avb_pins>;\n-\tpinctrl-names = \"default\";\n-\trenesas,no-ether-link;\n-\tphy-handle = <&phy0>;\n-\tstatus = \"okay\";\n-\n-\tphy0: ethernet-phy@0 {\n-\t\trxc-skew-ps = <1500>;\n-\t\treg = <0>;\n-\t\tinterrupt-parent = <&gpio2>;\n-\t\tinterrupts = <11 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-&usb2_phy1 {\n-\tpinctrl-0 = <&usb1_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-};\n-\n-&ehci1 {\n-\tstatus = \"okay\";\n-};\n-\n-&ohci1 {\n-\tstatus = \"okay\";\n };\ndiff --git a/arch/arm/dts/r8a7795-salvator-x.dts b/arch/arm/dts/r8a7795-salvator-x.dts\nindex 639aa085d9..684fb3b9d1 100644\n--- a/arch/arm/dts/r8a7795-salvator-x.dts\n+++ b/arch/arm/dts/r8a7795-salvator-x.dts\n@@ -8,577 +8,108 @@\n * kind, whether express or implied.\n */\n \n-/*\n- * SSI-AK4613\n- *\n- * This command is required when Playback/Capture\n- *\n- *\tamixer set \"DVC Out\" 100%\n- *\tamixer set \"DVC In\" 100%\n- *\n- * You can use Mute\n- *\n- *\tamixer set \"DVC Out Mute\" on\n- *\tamixer set \"DVC In Mute\" on\n- *\n- * You can use Volume Ramp\n- *\n- *\tamixer set \"DVC Out Ramp Up Rate\" \"0.125 dB/64 steps\"\n- *\tamixer set \"DVC Out Ramp Down Rate\" \"0.125 dB/512 steps\"\n- *\tamixer set \"DVC Out Ramp\" on\n- *\taplay xxx.wav &\n- *\tamixer set \"DVC Out\" 80% // Volume Down\n- *\tamixer set \"DVC Out\" 100% // Volume Up\n- */\n+#define CPG_AUDIO_CLK_I\t\tR8A7795_CLK_S0D4\n \n /dts-v1/;\n #include \"r8a7795.dtsi\"\n-#include \n+#include \"salvator-x.dtsi\"\n \n / {\n-\tmodel = \"Renesas Salvator-X board based on r8a7795\";\n+\tmodel = \"Renesas Salvator-X board based on r8a7795 ES2.0+\";\n \tcompatible = \"renesas,salvator-x\", \"renesas,r8a7795\";\n \n-\taliases {\n-\t\tserial0 = &scif2;\n-\t\tserial1 = &scif1;\n-\t\tethernet0 = &avb;\n-\t};\n-\n-\tchosen {\n-\t\tbootargs = \"ignore_loglevel rw root=/dev/nfs ip=dhcp\";\n-\t\tstdout-path = \"serial0:115200n8\";\n-\t};\n-\n \tmemory@48000000 {\n \t\tdevice_type = \"memory\";\n \t\t/* first 128MB is reserved for secure area. */\n \t\treg = <0x0 0x48000000 0x0 0x38000000>;\n \t};\n \n-\tx12_clk: x12 {\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <24576000>;\n-\t};\n-\n-\treg_1p8v: regulator0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-1.8V\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\treg_3p3v: regulator1 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-3.3V\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\tvcc_sdhi0: regulator-vcc-sdhi0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"SDHI0 Vcc\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tvccq_sdhi0: regulator-vccq-sdhi0 {\n-\t\tcompatible = \"regulator-gpio\";\n-\n-\t\tregulator-name = \"SDHI0 VccQ\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;\n-\t\tgpios-states = <1>;\n-\t\tstates = <3300000 1\n-\t\t\t 1800000 0>;\n-\t};\n-\n-\tvcc_sdhi3: regulator-vcc-sdhi3 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"SDHI3 Vcc\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tvccq_sdhi3: regulator-vccq-sdhi3 {\n-\t\tcompatible = \"regulator-gpio\";\n-\n-\t\tregulator-name = \"SDHI3 VccQ\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;\n-\t\tgpios-states = <1>;\n-\t\tstates = <3300000 1\n-\t\t\t 1800000 0>;\n+\tmemory@500000000 {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0x5 0x00000000 0x0 0x40000000>;\n \t};\n \n-\tvbus0_usb2: regulator-vbus0-usb2 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"USB20_VBUS0\";\n-\t\tregulator-min-microvolt = <5000000>;\n-\t\tregulator-max-microvolt = <5000000>;\n-\n-\t\tgpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n+\tmemory@600000000 {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0x6 0x00000000 0x0 0x40000000>;\n \t};\n \n-\taudio_clkout: audio_clkout {\n-\t\t/*\n-\t\t * This is same as <&rcar_sound 0>\n-\t\t * but needed to avoid cs2000/rcar_sound probe dead-lock\n-\t\t */\n-\t\tcompatible = \"fixed-clock\";\n-\t\t#clock-cells = <0>;\n-\t\tclock-frequency = <11289600>;\n+\tmemory@700000000 {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0x7 0x00000000 0x0 0x40000000>;\n \t};\n+};\n \n-\trsnd_ak4613: sound {\n-\t\tcompatible = \"simple-audio-card\";\n-\n-\t\tsimple-audio-card,format = \"left_j\";\n-\t\tsimple-audio-card,bitclock-master = <&sndcpu>;\n-\t\tsimple-audio-card,frame-master = <&sndcpu>;\n-\n-\t\tsndcpu: simple-audio-card,cpu {\n-\t\t\tsound-dai = <&rcar_sound>;\n-\t\t};\n-\n-\t\tsndcodec: simple-audio-card,codec {\n-\t\t\tsound-dai = <&ak4613>;\n-\t\t};\n-\t};\n+&du {\n+\tclocks = <&cpg CPG_MOD 724>,\n+\t\t <&cpg CPG_MOD 723>,\n+\t\t <&cpg CPG_MOD 722>,\n+\t\t <&cpg CPG_MOD 721>,\n+\t\t <&cpg CPG_MOD 727>,\n+\t\t <&versaclock5 1>,\n+\t\t <&x21_clk>,\n+\t\t <&x22_clk>,\n+\t\t <&versaclock5 2>;\n+\tclock-names = \"du.0\", \"du.1\", \"du.2\", \"du.3\", \"lvds.0\",\n+\t\t \"dclkin.0\", \"dclkin.1\", \"dclkin.2\", \"dclkin.3\";\n+};\n \n-\tvga-encoder {\n-\t\tcompatible = \"adi,adv7123\";\n+&ehci2 {\n+\tstatus = \"okay\";\n+};\n \n-\t\tports {\n-\t\t\t#address-cells = <1>;\n-\t\t\t#size-cells = <0>;\n+&hdmi0 {\n+\tstatus = \"okay\";\n \n-\t\t\tport@0 {\n-\t\t\t\treg = <0>;\n-\t\t\t\tadv7123_in: endpoint {\n-\t\t\t\t\tremote-endpoint = <&du_out_rgb>;\n-\t\t\t\t};\n-\t\t\t};\n-\t\t\tport@1 {\n-\t\t\t\treg = <1>;\n-\t\t\t\tadv7123_out: endpoint {\n-\t\t\t\t\tremote-endpoint = <&vga_in>;\n-\t\t\t\t};\n+\tports {\n+\t\tport@1 {\n+\t\t\treg = <1>;\n+\t\t\trcar_dw_hdmi0_out: endpoint {\n+\t\t\t\tremote-endpoint = <&hdmi0_con>;\n \t\t\t};\n \t\t};\n \t};\n+};\n \n-\tvga {\n-\t\tcompatible = \"vga-connector\";\n-\n-\t\tport {\n-\t\t\tvga_in: endpoint {\n-\t\t\t\tremote-endpoint = <&adv7123_out>;\n-\t\t\t};\n-\t\t};\n-\t};\n+&hdmi0_con {\n+\tremote-endpoint = <&rcar_dw_hdmi0_out>;\n };\n \n-&du {\n-\tpinctrl-0 = <&du_pins>;\n-\tpinctrl-names = \"default\";\n+&hdmi1 {\n \tstatus = \"okay\";\n \n \tports {\n-\t\tport@0 {\n-\t\t\tendpoint {\n-\t\t\t\tremote-endpoint = <&adv7123_in>;\n-\t\t\t};\n-\t\t};\n-\t\tport@3 {\n-\t\t\tlvds_connector: endpoint {\n+\t\tport@1 {\n+\t\t\treg = <1>;\n+\t\t\trcar_dw_hdmi1_out: endpoint {\n+\t\t\t\tremote-endpoint = <&hdmi1_con>;\n \t\t\t};\n \t\t};\n \t};\n };\n \n-&extal_clk {\n-\tclock-frequency = <16666666>;\n+&hdmi1_con {\n+\tremote-endpoint = <&rcar_dw_hdmi1_out>;\n };\n \n-&extalr_clk {\n-\tclock-frequency = <32768>;\n+&ohci2 {\n+\tstatus = \"okay\";\n };\n \n &pfc {\n-\tpinctrl-0 = <&scif_clk_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tscif1_pins: scif1 {\n-\t\tgroups = \"scif1_data_a\", \"scif1_ctrl\";\n-\t\tfunction = \"scif1\";\n-\t};\n-\tscif2_pins: scif2 {\n-\t\tgroups = \"scif2_data_a\";\n-\t\tfunction = \"scif2\";\n-\t};\n-\tscif_clk_pins: scif_clk {\n-\t\tgroups = \"scif_clk_a\";\n-\t\tfunction = \"scif_clk\";\n-\t};\n-\n-\ti2c2_pins: i2c2 {\n-\t\tgroups = \"i2c2_a\";\n-\t\tfunction = \"i2c2\";\n-\t};\n-\n-\tavb_pins: avb {\n-\t\tmux {\n-\t\t\tgroups = \"avb_link\", \"avb_phy_int\", \"avb_mdc\",\n-\t\t\t\t \"avb_mii\";\n-\t\t\tfunction = \"avb\";\n-\t\t};\n-\n-\t\tpins_mdc {\n-\t\t\tgroups = \"avb_mdc\";\n-\t\t\tdrive-strength = <24>;\n-\t\t};\n-\n-\t\tpins_mii_tx {\n-\t\t\tpins = \"PIN_AVB_TX_CTL\", \"PIN_AVB_TXC\", \"PIN_AVB_TD0\",\n-\t\t\t \"PIN_AVB_TD1\", \"PIN_AVB_TD2\", \"PIN_AVB_TD3\";\n-\t\t\tdrive-strength = <12>;\n-\t\t};\n-\t};\n-\n-\tdu_pins: du {\n-\t\tgroups = \"du_rgb888\", \"du_sync\", \"du_oddf\", \"du_clk_out_0\";\n-\t\tfunction = \"du\";\n-\t};\n-\n-\tsdhi0_pins: sd0 {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi0_pins_uhs: sd0_uhs {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsdhi2_pins: sd2 {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi2_pins_uhs: sd2_uhs {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsdhi3_pins: sd3 {\n-\t\tgroups = \"sdhi3_data4\", \"sdhi3_ctrl\";\n-\t\tfunction = \"sdhi3\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi3_pins_uhs: sd3_uhs {\n-\t\tgroups = \"sdhi3_data4\", \"sdhi3_ctrl\";\n-\t\tfunction = \"sdhi3\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsound_pins: sound {\n-\t\tgroups = \"ssi01239_ctrl\", \"ssi0_data\", \"ssi1_data_a\";\n-\t\tfunction = \"ssi\";\n-\t};\n-\n-\tsound_clk_pins: sound_clk {\n-\t\tgroups = \"audio_clk_a_a\", \"audio_clk_b_a\", \"audio_clk_c_a\",\n-\t\t\t \"audio_clkout_a\", \"audio_clkout3_a\";\n-\t\tfunction = \"audio_clk\";\n-\t};\n-\n-\tusb0_pins: usb0 {\n-\t\tgroups = \"usb0\";\n-\t\tfunction = \"usb0\";\n-\t};\n-\n-\tusb1_pins: usb1 {\n-\t\tmux {\n-\t\t\tgroups = \"usb1\";\n-\t\t\tfunction = \"usb1\";\n-\t\t};\n-\n-\t\tovc {\n-\t\t\tpins = \"GP_6_27\";\n-\t\t\tbias-pull-up;\n-\t\t};\n-\n-\t\tpwen {\n-\t\t\tpins = \"GP_6_26\";\n-\t\t\tbias-pull-down;\n-\t\t};\n-\t};\n-\n \tusb2_pins: usb2 {\n \t\tgroups = \"usb2\";\n \t\tfunction = \"usb2\";\n \t};\n };\n \n-&scif1 {\n-\tpinctrl-0 = <&scif1_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tuart-has-rtscts;\n-\tstatus = \"okay\";\n-};\n-\n-&scif2 {\n-\tpinctrl-0 = <&scif2_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-};\n-\n-&scif_clk {\n-\tclock-frequency = <14745600>;\n-};\n-\n-&i2c2 {\n-\tpinctrl-0 = <&i2c2_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-\n-\tclock-frequency = <100000>;\n-\n-\tak4613: codec@10 {\n-\t\tcompatible = \"asahi-kasei,ak4613\";\n-\t\t#sound-dai-cells = <0>;\n-\t\treg = <0x10>;\n-\t\tclocks = <&rcar_sound 3>;\n-\n-\t\tasahi-kasei,in1-single-end;\n-\t\tasahi-kasei,in2-single-end;\n-\t\tasahi-kasei,out1-single-end;\n-\t\tasahi-kasei,out2-single-end;\n-\t\tasahi-kasei,out3-single-end;\n-\t\tasahi-kasei,out4-single-end;\n-\t\tasahi-kasei,out5-single-end;\n-\t\tasahi-kasei,out6-single-end;\n-\t};\n-\n-\tcs2000: clk_multiplier@4f {\n-\t\t#clock-cells = <0>;\n-\t\tcompatible = \"cirrus,cs2000-cp\";\n-\t\treg = <0x4f>;\n-\t\tclocks = <&audio_clkout>, <&x12_clk>;\n-\t\tclock-names = \"clk_in\", \"ref_clk\";\n-\n-\t\tassigned-clocks = <&cs2000>;\n-\t\tassigned-clock-rates = <24576000>; /* 1/1 divide */\n-\t};\n-};\n-\n-&rcar_sound {\n-\tpinctrl-0 = <&sound_pins &sound_clk_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\t/* Single DAI */\n-\t#sound-dai-cells = <0>;\n-\n-\t/* audio_clkout0/1/2/3 */\n-\t#clock-cells = <1>;\n-\tclock-frequency = <11289600>;\n-\n-\tstatus = \"okay\";\n-\n-\t/* update to */\n-\tclocks = <&cpg CPG_MOD 1005>,\n-\t\t <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,\n-\t\t <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,\n-\t\t <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,\n-\t\t <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,\n-\t\t <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,\n-\t\t <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,\n-\t\t <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,\n-\t\t <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,\n-\t\t <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,\n-\t\t <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,\n-\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n-\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n-\t\t <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,\n-\t\t <&audio_clk_a>, <&cs2000>,\n-\t\t <&audio_clk_c>,\n-\t\t <&cpg CPG_CORE R8A7795_CLK_S0D4>;\n-\n-\trcar_sound,dai {\n-\t\tdai0 {\n-\t\t\tplayback = <&ssi0 &src0 &dvc0>;\n-\t\t\tcapture = <&ssi1 &src1 &dvc1>;\n-\t\t};\n-\t};\n-};\n-\n &sata {\n \tstatus = \"okay\";\n };\n \n-&sdhi0 {\n-\tpinctrl-0 = <&sdhi0_pins>;\n-\tpinctrl-1 = <&sdhi0_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <&vcc_sdhi0>;\n-\tvqmmc-supply = <&vccq_sdhi0>;\n-\tcd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;\n-\twp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;\n-\tbus-width = <4>;\n-\tsd-uhs-sdr50;\n-\tstatus = \"okay\";\n-};\n-\n-&sdhi2 {\n-\t/* used for on-board 8bit eMMC */\n-\tpinctrl-0 = <&sdhi2_pins>;\n-\tpinctrl-1 = <&sdhi2_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <®_3p3v>;\n-\tvqmmc-supply = <®_1p8v>;\n-\tbus-width = <8>;\n-\tnon-removable;\n-\tstatus = \"okay\";\n-};\n-\n-&sdhi3 {\n-\tpinctrl-0 = <&sdhi3_pins>;\n-\tpinctrl-1 = <&sdhi3_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <&vcc_sdhi3>;\n-\tvqmmc-supply = <&vccq_sdhi3>;\n-\tcd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;\n-\twp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;\n-\tbus-width = <4>;\n-\tsd-uhs-sdr50;\n-\tstatus = \"okay\";\n-};\n-\n-&ssi1 {\n-\tshared-pin;\n-};\n-\n-&wdt0 {\n-\ttimeout-sec = <60>;\n-\tstatus = \"okay\";\n-};\n-\n-&audio_clk_a {\n-\tclock-frequency = <22579200>;\n-};\n-\n-&i2c_dvfs {\n-\tstatus = \"okay\";\n-};\n-\n-&avb {\n-\tpinctrl-0 = <&avb_pins>;\n-\tpinctrl-names = \"default\";\n-\trenesas,no-ether-link;\n-\tphy-handle = <&phy0>;\n-\tstatus = \"okay\";\n-\n-\tphy0: ethernet-phy@0 {\n-\t\trxc-skew-ps = <1500>;\n-\t\treg = <0>;\n-\t\tinterrupt-parent = <&gpio2>;\n-\t\tinterrupts = <11 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-&xhci0 {\n-\tstatus = \"okay\";\n-};\n-\n-&usb2_phy0 {\n-\tpinctrl-0 = <&usb0_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tvbus-supply = <&vbus0_usb2>;\n-\tstatus = \"okay\";\n-};\n-\n-&usb2_phy1 {\n-\tpinctrl-0 = <&usb1_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-};\n-\n &usb2_phy2 {\n \tpinctrl-0 = <&usb2_pins>;\n \tpinctrl-names = \"default\";\n \n \tstatus = \"okay\";\n };\n-\n-&ehci0 {\n-\tstatus = \"okay\";\n-};\n-\n-&ehci1 {\n-\tstatus = \"okay\";\n-};\n-\n-&ehci2 {\n-\tstatus = \"okay\";\n-};\n-\n-&ohci0 {\n-\tstatus = \"okay\";\n-};\n-\n-&ohci1 {\n-\tstatus = \"okay\";\n-};\n-\n-&ohci2 {\n-\tstatus = \"okay\";\n-};\n-\n-&hsusb {\n-\tstatus = \"okay\";\n-};\n-\n-&pcie_bus_clk {\n-\tclock-frequency = <100000000>;\n-};\n-\n-&pciec0 {\n-\tstatus = \"okay\";\n-};\n-\n-&pciec1 {\n-\tstatus = \"okay\";\n-};\ndiff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi\nindex 110d0681c8..615b652131 100644\n--- a/arch/arm/dts/r8a7795.dtsi\n+++ b/arch/arm/dts/r8a7795.dtsi\n@@ -184,7 +184,7 @@\n \t\tclock-frequency = <0>;\n \t};\n \n-\tsoc {\n+\tsoc: soc {\n \t\tcompatible = \"simple-bus\";\n \t\tinterrupt-parent = <&gic>;\n \n@@ -402,7 +402,7 @@\n \t\t\t#power-domain-cells = <1>;\n \t\t};\n \n-\t\tpfc: pfc@e6060000 {\n+\t\tpfc: pin-controller@e6060000 {\n \t\t\tcompatible = \"renesas,pfc-r8a7795\";\n \t\t\treg = <0 0xe6060000 0 0x50c>;\n \t\t};\n@@ -887,6 +887,8 @@\n \t\t\tclocks = <&cpg CPG_MOD 926>;\n \t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n \t\t\tresets = <&cpg 926>;\n+\t\t\tdmas = <&dmac0 0x11>, <&dmac0 0x10>;\n+\t\t\tdma-names = \"tx\", \"rx\";\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n@@ -1122,6 +1124,16 @@\n \t\t\t\t \"dvc.0\", \"dvc.1\",\n \t\t\t\t \"clk_a\", \"clk_b\", \"clk_c\", \"clk_i\";\n \t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n+\t\t\tresets = <&cpg 1005>,\n+\t\t\t\t <&cpg 1006>, <&cpg 1007>,\n+\t\t\t\t <&cpg 1008>, <&cpg 1009>,\n+\t\t\t\t <&cpg 1010>, <&cpg 1011>,\n+\t\t\t\t <&cpg 1012>, <&cpg 1013>,\n+\t\t\t\t <&cpg 1014>, <&cpg 1015>;\n+\t\t\treset-names = \"ssi-all\",\n+\t\t\t\t \"ssi.9\", \"ssi.8\", \"ssi.7\", \"ssi.6\",\n+\t\t\t\t \"ssi.5\", \"ssi.4\", \"ssi.3\", \"ssi.2\",\n+\t\t\t\t \"ssi.1\", \"ssi.0\";\n \t\t\tstatus = \"disabled\";\n \n \t\t\trcar_sound,dvc {\n@@ -1278,16 +1290,6 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n-\t\txhci1: usb@ee0400000 {\n-\t\t\tcompatible = \"renesas,xhci-r8a7795\", \"renesas,rcar-gen3-xhci\";\n-\t\t\treg = <0 0xee040000 0 0xc00>;\n-\t\t\tinterrupts = ;\n-\t\t\tclocks = <&cpg CPG_MOD 327>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n-\t\t\tresets = <&cpg 327>;\n-\t\t\tstatus = \"disabled\";\n-\t\t};\n-\n \t\tusb_dmac0: dma-controller@e65a0000 {\n \t\t\tcompatible = \"renesas,r8a7795-usb-dmac\",\n \t\t\t\t \"renesas,usb-dmac\";\n@@ -1572,14 +1574,6 @@\n \t\t\tresets = <&cpg 614>;\n \t\t};\n \n-\t\tfcpf2: fcp@fe952000 {\n-\t\t\tcompatible = \"renesas,fcpf\";\n-\t\t\treg = <0 0xfe952000 0 0x200>;\n-\t\t\tclocks = <&cpg CPG_MOD 613>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_A3VP>;\n-\t\t\tresets = <&cpg 613>;\n-\t\t};\n-\n \t\tvspbd: vsp@fe960000 {\n \t\t\tcompatible = \"renesas,vsp2\";\n \t\t\treg = <0 0xfe960000 0 0x8000>;\n@@ -1637,25 +1631,6 @@\n \t\t\tresets = <&cpg 610>;\n \t\t};\n \n-\t\tvspi2: vsp@fe9c0000 {\n-\t\t\tcompatible = \"renesas,vsp2\";\n-\t\t\treg = <0 0xfe9c0000 0 0x8000>;\n-\t\t\tinterrupts = ;\n-\t\t\tclocks = <&cpg CPG_MOD 629>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_A3VP>;\n-\t\t\tresets = <&cpg 629>;\n-\n-\t\t\trenesas,fcp = <&fcpvi2>;\n-\t\t};\n-\n-\t\tfcpvi2: fcp@fe9cf000 {\n-\t\t\tcompatible = \"renesas,fcpv\";\n-\t\t\treg = <0 0xfe9cf000 0 0x200>;\n-\t\t\tclocks = <&cpg CPG_MOD 609>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_A3VP>;\n-\t\t\tresets = <&cpg 609>;\n-\t\t};\n-\n \t\tvspd0: vsp@fea20000 {\n \t\t\tcompatible = \"renesas,vsp2\";\n \t\t\treg = <0 0xfea20000 0 0x4000>;\n@@ -1713,25 +1688,6 @@\n \t\t\tresets = <&cpg 601>;\n \t\t};\n \n-\t\tvspd3: vsp@fea38000 {\n-\t\t\tcompatible = \"renesas,vsp2\";\n-\t\t\treg = <0 0xfea38000 0 0x4000>;\n-\t\t\tinterrupts = ;\n-\t\t\tclocks = <&cpg CPG_MOD 620>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n-\t\t\tresets = <&cpg 620>;\n-\n-\t\t\trenesas,fcp = <&fcpvd3>;\n-\t\t};\n-\n-\t\tfcpvd3: fcp@fea3f000 {\n-\t\t\tcompatible = \"renesas,fcpv\";\n-\t\t\treg = <0 0xfea3f000 0 0x200>;\n-\t\t\tclocks = <&cpg CPG_MOD 600>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n-\t\t\tresets = <&cpg 600>;\n-\t\t};\n-\n \t\tfdp1@fe940000 {\n \t\t\tcompatible = \"renesas,fdp1\";\n \t\t\treg = <0 0xfe940000 0 0x2400>;\n@@ -1752,18 +1708,57 @@\n \t\t\trenesas,fcp = <&fcpf1>;\n \t\t};\n \n-\t\tfdp1@fe948000 {\n-\t\t\tcompatible = \"renesas,fdp1\";\n-\t\t\treg = <0 0xfe948000 0 0x2400>;\n-\t\t\tinterrupts = ;\n-\t\t\tclocks = <&cpg CPG_MOD 117>;\n-\t\t\tpower-domains = <&sysc R8A7795_PD_A3VP>;\n-\t\t\tresets = <&cpg 117>;\n-\t\t\trenesas,fcp = <&fcpf2>;\n+\t\thdmi0: hdmi0@fead0000 {\n+\t\t\tcompatible = \"renesas,r8a7795-hdmi\", \"renesas,rcar-gen3-hdmi\";\n+\t\t\treg = <0 0xfead0000 0 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tclocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;\n+\t\t\tclock-names = \"iahb\", \"isfr\";\n+\t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n+\t\t\tresets = <&cpg 729>;\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\tports {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tport@0 {\n+\t\t\t\t\treg = <0>;\n+\t\t\t\t\tdw_hdmi0_in: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&du_out_hdmi0>;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t\tport@1 {\n+\t\t\t\t\treg = <1>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\n+\t\thdmi1: hdmi1@feae0000 {\n+\t\t\tcompatible = \"renesas,r8a7795-hdmi\", \"renesas,rcar-gen3-hdmi\";\n+\t\t\treg = <0 0xfeae0000 0 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tclocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;\n+\t\t\tclock-names = \"iahb\", \"isfr\";\n+\t\t\tpower-domains = <&sysc R8A7795_PD_ALWAYS_ON>;\n+\t\t\tresets = <&cpg 728>;\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\tports {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tport@0 {\n+\t\t\t\t\treg = <0>;\n+\t\t\t\t\tdw_hdmi1_in: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&du_out_hdmi1>;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t\tport@1 {\n+\t\t\t\t\treg = <1>;\n+\t\t\t\t};\n+\t\t\t};\n \t\t};\n \n \t\tdu: display@feb00000 {\n-\t\t\tcompatible = \"renesas,du-r8a7795\";\n \t\t\treg = <0 0xfeb00000 0 0x80000>,\n \t\t\t <0 0xfeb90000 0 0x14>;\n \t\t\treg-names = \"du\", \"lvds.0\";\n@@ -1779,8 +1774,6 @@\n \t\t\tclock-names = \"du.0\", \"du.1\", \"du.2\", \"du.3\", \"lvds.0\";\n \t\t\tstatus = \"disabled\";\n \n-\t\t\tvsps = <&vspd0 &vspd1 &vspd2 &vspd3>;\n-\n \t\t\tports {\n \t\t\t\t#address-cells = <1>;\n \t\t\t\t#size-cells = <0>;\n@@ -1793,11 +1786,13 @@\n \t\t\t\tport@1 {\n \t\t\t\t\treg = <1>;\n \t\t\t\t\tdu_out_hdmi0: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&dw_hdmi0_in>;\n \t\t\t\t\t};\n \t\t\t\t};\n \t\t\t\tport@2 {\n \t\t\t\t\treg = <2>;\n \t\t\t\t\tdu_out_hdmi1: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&dw_hdmi1_in>;\n \t\t\t\t\t};\n \t\t\t\t};\n \t\t\t\tport@3 {\ndiff --git a/arch/arm/dts/r8a7796-m3ulcb.dts b/arch/arm/dts/r8a7796-m3ulcb.dts\nindex 372b2a9447..38b58b7fca 100644\n--- a/arch/arm/dts/r8a7796-m3ulcb.dts\n+++ b/arch/arm/dts/r8a7796-m3ulcb.dts\n@@ -9,180 +9,24 @@\n * kind, whether express or implied.\n */\n \n+#define CPG_AUDIO_CLK_I\t\tR8A7796_CLK_S0D4\n+\n /dts-v1/;\n #include \"r8a7796.dtsi\"\n-#include \n-#include \n+#include \"ulcb.dtsi\"\n \n / {\n \tmodel = \"Renesas M3ULCB board based on r8a7796\";\n \tcompatible = \"renesas,m3ulcb\", \"renesas,r8a7796\";\n \n-\taliases {\n-\t\tserial0 = &scif2;\n-\t};\n-\n-\tchosen {\n-\t\tstdout-path = \"serial0:115200n8\";\n-\t};\n-\n \tmemory@48000000 {\n \t\tdevice_type = \"memory\";\n \t\t/* first 128MB is reserved for secure area. */\n \t\treg = <0x0 0x48000000 0x0 0x38000000>;\n \t};\n \n-\tleds {\n-\t\tcompatible = \"gpio-leds\";\n-\n-\t\tled5 {\n-\t\t\tgpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;\n-\t\t};\n-\t\tled6 {\n-\t\t\tgpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;\n-\t\t};\n-\t};\n-\n-\tkeyboard {\n-\t\tcompatible = \"gpio-keys\";\n-\n-\t\tkey-1 {\n-\t\t\tlinux,code = ;\n-\t\t\tlabel = \"SW3\";\n-\t\t\twakeup-source;\n-\t\t\tdebounce-interval = <20>;\n-\t\t\tgpios = <&gpio6 11 GPIO_ACTIVE_LOW>;\n-\t\t};\n-\t};\n-\n-\treg_1p8v: regulator0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-1.8V\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\treg_3p3v: regulator1 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-3.3V\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\tvcc_sdhi0: regulator-vcc-sdhi0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"SDHI0 Vcc\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tvccq_sdhi0: regulator-vccq-sdhi0 {\n-\t\tcompatible = \"regulator-gpio\";\n-\n-\t\tregulator-name = \"SDHI0 VccQ\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;\n-\t\tgpios-states = <1>;\n-\t\tstates = <3300000 1\n-\t\t\t 1800000 0>;\n-\t};\n-};\n-\n-&extal_clk {\n-\tclock-frequency = <16666666>;\n-};\n-\n-&extalr_clk {\n-\tclock-frequency = <32768>;\n-};\n-\n-&pfc {\n-\tpinctrl-0 = <&scif_clk_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tscif2_pins: scif2 {\n-\t\tgroups = \"scif2_data_a\";\n-\t\tfunction = \"scif2\";\n-\t};\n-\n-\tscif_clk_pins: scif_clk {\n-\t\tgroups = \"scif_clk_a\";\n-\t\tfunction = \"scif_clk\";\n-\t};\n-\n-\tsdhi0_pins: sd0 {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi0_pins_uhs: sd0_uhs {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsdhi2_pins: sd2 {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi2_pins_uhs: sd2_uhs {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <1800>;\n+\tmemory@600000000 {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0x6 0x00000000 0x0 0x40000000>;\n \t};\n };\n-\n-&sdhi0 {\n-\tpinctrl-0 = <&sdhi0_pins>;\n-\tpinctrl-1 = <&sdhi0_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <&vcc_sdhi0>;\n-\tvqmmc-supply = <&vccq_sdhi0>;\n-\tcd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;\n-\tbus-width = <4>;\n-\tsd-uhs-sdr50;\n-\tstatus = \"okay\";\n-};\n-\n-&sdhi2 {\n-\t/* used for on-board 8bit eMMC */\n-\tpinctrl-0 = <&sdhi2_pins>;\n-\tpinctrl-1 = <&sdhi2_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <®_3p3v>;\n-\tvqmmc-supply = <®_1p8v>;\n-\tbus-width = <8>;\n-\tnon-removable;\n-\tstatus = \"okay\";\n-};\n-\n-&scif2 {\n-\tpinctrl-0 = <&scif2_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-};\n-\n-&scif_clk {\n-\tclock-frequency = <14745600>;\n-};\n-\n-&wdt0 {\n-\ttimeout-sec = <60>;\n-\tstatus = \"okay\";\n-};\ndiff --git a/arch/arm/dts/r8a7796-salvator-x.dts b/arch/arm/dts/r8a7796-salvator-x.dts\nindex c9f59b6ce3..db4f162d6b 100644\n--- a/arch/arm/dts/r8a7796-salvator-x.dts\n+++ b/arch/arm/dts/r8a7796-salvator-x.dts\n@@ -8,25 +8,16 @@\n * kind, whether express or implied.\n */\n \n+#define CPG_AUDIO_CLK_I\t\tR8A7796_CLK_S0D4\n+\n /dts-v1/;\n #include \"r8a7796.dtsi\"\n-#include \n+#include \"salvator-x.dtsi\"\n \n / {\n \tmodel = \"Renesas Salvator-X board based on r8a7796\";\n \tcompatible = \"renesas,salvator-x\", \"renesas,r8a7796\";\n \n-\taliases {\n-\t\tserial0 = &scif2;\n-\t\tserial1 = &scif1;\n-\t\tethernet0 = &avb;\n-\t};\n-\n-\tchosen {\n-\t\tbootargs = \"ignore_loglevel\";\n-\t\tstdout-path = \"serial0:115200n8\";\n-\t};\n-\n \tmemory@48000000 {\n \t\tdevice_type = \"memory\";\n \t\t/* first 128MB is reserved for secure area. */\n@@ -37,233 +28,4 @@\n \t\tdevice_type = \"memory\";\n \t\treg = <0x6 0x00000000 0x0 0x80000000>;\n \t};\n-\n-\treg_1p8v: regulator0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-1.8V\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <1800000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\treg_3p3v: regulator1 {\n-\t\tcompatible = \"regulator-fixed\";\n-\t\tregulator-name = \"fixed-3.3V\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\t\tregulator-boot-on;\n-\t\tregulator-always-on;\n-\t};\n-\n-\tvcc_sdhi0: regulator-vcc-sdhi0 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"SDHI0 Vcc\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tvccq_sdhi0: regulator-vccq-sdhi0 {\n-\t\tcompatible = \"regulator-gpio\";\n-\n-\t\tregulator-name = \"SDHI0 VccQ\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;\n-\t\tgpios-states = <1>;\n-\t\tstates = <3300000 1\n-\t\t\t 1800000 0>;\n-\t};\n-\n-\tvcc_sdhi3: regulator-vcc-sdhi3 {\n-\t\tcompatible = \"regulator-fixed\";\n-\n-\t\tregulator-name = \"SDHI3 Vcc\";\n-\t\tregulator-min-microvolt = <3300000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;\n-\t\tenable-active-high;\n-\t};\n-\n-\tvccq_sdhi3: regulator-vccq-sdhi3 {\n-\t\tcompatible = \"regulator-gpio\";\n-\n-\t\tregulator-name = \"SDHI3 VccQ\";\n-\t\tregulator-min-microvolt = <1800000>;\n-\t\tregulator-max-microvolt = <3300000>;\n-\n-\t\tgpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;\n-\t\tgpios-states = <1>;\n-\t\tstates = <3300000 1\n-\t\t\t 1800000 0>;\n-\t};\n-};\n-\n-&pfc {\n-\tpinctrl-0 = <&scif_clk_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tavb_pins: avb {\n-\t\tgroups = \"avb_mdc\";\n-\t\tfunction = \"avb\";\n-\t};\n-\n-\tscif1_pins: scif1 {\n-\t\tgroups = \"scif1_data_a\", \"scif1_ctrl\";\n-\t\tfunction = \"scif1\";\n-\t};\n-\n-\tscif2_pins: scif2 {\n-\t\tgroups = \"scif2_data_a\";\n-\t\tfunction = \"scif2\";\n-\t};\n-\tscif_clk_pins: scif_clk {\n-\t\tgroups = \"scif_clk_a\";\n-\t\tfunction = \"scif_clk\";\n-\t};\n-\n-\ti2c2_pins: i2c2 {\n-\t\tgroups = \"i2c2_a\";\n-\t\tfunction = \"i2c2\";\n-\t};\n-\n-\tsdhi0_pins: sd0 {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi0_pins_uhs: sd0_uhs {\n-\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n-\t\tfunction = \"sdhi0\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsdhi2_pins: sd2 {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi2_pins_uhs: sd2_uhs {\n-\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n-\t\tfunction = \"sdhi2\";\n-\t\tpower-source = <1800>;\n-\t};\n-\n-\tsdhi3_pins: sd3 {\n-\t\tgroups = \"sdhi3_data4\", \"sdhi3_ctrl\";\n-\t\tfunction = \"sdhi3\";\n-\t\tpower-source = <3300>;\n-\t};\n-\n-\tsdhi3_pins_uhs: sd3_uhs {\n-\t\tgroups = \"sdhi3_data4\", \"sdhi3_ctrl\";\n-\t\tfunction = \"sdhi3\";\n-\t\tpower-source = <1800>;\n-\t};\n-};\n-\n-&avb {\n-\tpinctrl-0 = <&avb_pins>;\n-\tpinctrl-names = \"default\";\n-\trenesas,no-ether-link;\n-\tphy-handle = <&phy0>;\n-\tstatus = \"okay\";\n-\n-\tphy0: ethernet-phy@0 {\n-\t\trxc-skew-ps = <1500>;\n-\t\treg = <0>;\n-\t\tinterrupt-parent = <&gpio2>;\n-\t\tinterrupts = <11 IRQ_TYPE_LEVEL_LOW>;\n-\t};\n-};\n-\n-&extal_clk {\n-\tclock-frequency = <16666666>;\n-};\n-\n-&extalr_clk {\n-\tclock-frequency = <32768>;\n-};\n-\n-&sdhi0 {\n-\tpinctrl-0 = <&sdhi0_pins>;\n-\tpinctrl-1 = <&sdhi0_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <&vcc_sdhi0>;\n-\tvqmmc-supply = <&vccq_sdhi0>;\n-\tcd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;\n-\twp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;\n-\tbus-width = <4>;\n-\tsd-uhs-sdr50;\n-\tstatus = \"okay\";\n-};\n-\n-&sdhi2 {\n-\t/* used for on-board 8bit eMMC */\n-\tpinctrl-0 = <&sdhi2_pins>;\n-\tpinctrl-1 = <&sdhi2_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <®_3p3v>;\n-\tvqmmc-supply = <®_1p8v>;\n-\tbus-width = <8>;\n-\tnon-removable;\n-\tstatus = \"okay\";\n-};\n-\n-&sdhi3 {\n-\tpinctrl-0 = <&sdhi3_pins>;\n-\tpinctrl-1 = <&sdhi3_pins_uhs>;\n-\tpinctrl-names = \"default\", \"state_uhs\";\n-\n-\tvmmc-supply = <&vcc_sdhi3>;\n-\tvqmmc-supply = <&vccq_sdhi3>;\n-\tcd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;\n-\twp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;\n-\tbus-width = <4>;\n-\tsd-uhs-sdr50;\n-\tstatus = \"okay\";\n-};\n-\n-&scif1 {\n-\tpinctrl-0 = <&scif1_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tuart-has-rtscts;\n-\tstatus = \"okay\";\n-};\n-\n-&scif2 {\n-\tpinctrl-0 = <&scif2_pins>;\n-\tpinctrl-names = \"default\";\n-\tstatus = \"okay\";\n-};\n-\n-&scif_clk {\n-\tclock-frequency = <14745600>;\n-};\n-\n-&i2c2 {\n-\tpinctrl-0 = <&i2c2_pins>;\n-\tpinctrl-names = \"default\";\n-\n-\tstatus = \"okay\";\n-};\n-\n-&wdt0 {\n-\ttimeout-sec = <60>;\n-\tstatus = \"okay\";\n-};\n-\n-&i2c_dvfs {\n-\tstatus = \"okay\";\n };\ndiff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a7796.dtsi\nindex 298df5db9f..c0cb4a952f 100644\n--- a/arch/arm/dts/r8a7796.dtsi\n+++ b/arch/arm/dts/r8a7796.dtsi\n@@ -122,6 +122,29 @@\n \t\tu-boot,dm-pre-reloc;\n \t};\n \n+\t/*\n+\t * The external audio clocks are configured as 0 Hz fixed frequency\n+\t * clocks by default.\n+\t * Boards that provide audio clocks should override them.\n+\t */\n+\taudio_clk_a: audio_clk_a {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <0>;\n+\t};\n+\n+\taudio_clk_b: audio_clk_b {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <0>;\n+\t};\n+\n+\taudio_clk_c: audio_clk_c {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <0>;\n+\t};\n+\n \t/* External CAN clock - to be overridden by boards that provide it */\n \tcan_clk: can {\n \t\tcompatible = \"fixed-clock\";\n@@ -136,6 +159,13 @@\n \t\tclock-frequency = <0>;\n \t};\n \n+\t/* External PCIe clock - can be overridden by the board */\n+\tpcie_bus_clk: pcie_bus {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <0>;\n+\t};\n+\n \tsoc {\n \t\tcompatible = \"simple-bus\";\n \t\tinterrupt-parent = <&gic>;\n@@ -366,6 +396,78 @@\n \t\t\tclocks = <&cpg CPG_MOD 926>;\n \t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n \t\t\tresets = <&cpg 926>;\n+\t\t\tdmas = <&dmac0 0x11>, <&dmac0 0x10>;\n+\t\t\tdma-names = \"tx\", \"rx\";\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm0: pwm@e6e30000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e30000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm1: pwm@e6e31000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e31000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm2: pwm@e6e32000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e32000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm3: pwm@e6e33000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e33000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm4: pwm@e6e34000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e34000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm5: pwm@e6e35000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e35000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tpwm6: pwm@e6e36000 {\n+\t\t\tcompatible = \"renesas,pwm-r8a7796\", \"renesas,pwm-rcar\";\n+\t\t\treg = <0 0xe6e36000 0 8>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tclocks = <&cpg CPG_MOD 523>;\n+\t\t\tresets = <&cpg 523>;\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n@@ -935,6 +1037,106 @@\n \t\t\tdma-channels = <16>;\n \t\t};\n \n+\t\taudma0: dma-controller@ec700000 {\n+\t\t\tcompatible = \"renesas,dmac-r8a7796\",\n+\t\t\t\t \"renesas,rcar-dmac\";\n+\t\t\treg = <0 0xec700000 0 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tinterrupt-names = \"error\",\n+\t\t\t\t\t\"ch0\", \"ch1\", \"ch2\", \"ch3\",\n+\t\t\t\t\t\"ch4\", \"ch5\", \"ch6\", \"ch7\",\n+\t\t\t\t\t\"ch8\", \"ch9\", \"ch10\", \"ch11\",\n+\t\t\t\t\t\"ch12\", \"ch13\", \"ch14\", \"ch15\";\n+\t\t\tclocks = <&cpg CPG_MOD 502>;\n+\t\t\tclock-names = \"fck\";\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tresets = <&cpg 502>;\n+\t\t\t#dma-cells = <1>;\n+\t\t\tdma-channels = <16>;\n+\t\t};\n+\n+\t\taudma1: dma-controller@ec720000 {\n+\t\t\tcompatible = \"renesas,dmac-r8a7796\",\n+\t\t\t\t \"renesas,rcar-dmac\";\n+\t\t\treg = <0 0xec720000 0 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tinterrupt-names = \"error\",\n+\t\t\t\t\t\"ch0\", \"ch1\", \"ch2\", \"ch3\",\n+\t\t\t\t\t\"ch4\", \"ch5\", \"ch6\", \"ch7\",\n+\t\t\t\t\t\"ch8\", \"ch9\", \"ch10\", \"ch11\",\n+\t\t\t\t\t\"ch12\", \"ch13\", \"ch14\", \"ch15\";\n+\t\t\tclocks = <&cpg CPG_MOD 501>;\n+\t\t\tclock-names = \"fck\";\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tresets = <&cpg 501>;\n+\t\t\t#dma-cells = <1>;\n+\t\t\tdma-channels = <16>;\n+\t\t};\n+\n+\t\thsusb: usb@e6590000 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\txhci0: usb@ee000000 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tohci0: usb@ee080000 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tehci0: usb@ee080100 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tusb2_phy0: usb-phy@ee080200 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tohci1: usb@ee0a0000 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tehci1: usb@ee0a0100 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tusb2_phy1: usb-phy@ee0a0200 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n \t\tsdhi0: sd@ee100000 {\n \t\t\tcompatible = \"renesas,sdhi-r8a7796\";\n \t\t\treg = <0 0xee100000 0 0x2000>;\n@@ -1037,5 +1239,224 @@\n \t\t\t\t};\n \t\t\t};\n \t\t};\n+\n+\t\trcar_sound: sound@ec500000 {\n+\t\t\t/*\n+\t\t\t * #sound-dai-cells is required\n+\t\t\t *\n+\t\t\t * Single DAI : #sound-dai-cells = <0>;\t<&rcar_sound>;\n+\t\t\t * Multi DAI : #sound-dai-cells = <1>;\t<&rcar_sound N>;\n+\t\t\t */\n+\t\t\t/*\n+\t\t\t * #clock-cells is required for audio_clkout0/1/2/3\n+\t\t\t *\n+\t\t\t * clkout\t: #clock-cells = <0>;\t<&rcar_sound>;\n+\t\t\t * clkout0/1/2/3: #clock-cells = <1>;\t<&rcar_sound N>;\n+\t\t\t */\n+\t\t\tcompatible = \"renesas,rcar_sound-r8a7796\", \"renesas,rcar_sound-gen3\";\n+\t\t\treg =\t<0 0xec500000 0 0x1000>, /* SCU */\n+\t\t\t\t<0 0xec5a0000 0 0x100>, /* ADG */\n+\t\t\t\t<0 0xec540000 0 0x1000>, /* SSIU */\n+\t\t\t\t<0 0xec541000 0 0x280>, /* SSI */\n+\t\t\t\t<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/\n+\t\t\treg-names = \"scu\", \"adg\", \"ssiu\", \"ssi\", \"audmapp\";\n+\n+\t\t\tclocks = <&cpg CPG_MOD 1005>,\n+\t\t\t\t <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,\n+\t\t\t\t <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,\n+\t\t\t\t <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,\n+\t\t\t\t <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,\n+\t\t\t\t <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,\n+\t\t\t\t <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,\n+\t\t\t\t <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,\n+\t\t\t\t <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,\n+\t\t\t\t <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,\n+\t\t\t\t <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,\n+\t\t\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n+\t\t\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n+\t\t\t\t <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,\n+\t\t\t\t <&audio_clk_a>, <&audio_clk_b>,\n+\t\t\t\t <&audio_clk_c>,\n+\t\t\t\t <&cpg CPG_CORE R8A7796_CLK_S0D4>;\n+\t\t\tclock-names = \"ssi-all\",\n+\t\t\t\t \"ssi.9\", \"ssi.8\", \"ssi.7\", \"ssi.6\",\n+\t\t\t\t \"ssi.5\", \"ssi.4\", \"ssi.3\", \"ssi.2\",\n+\t\t\t\t \"ssi.1\", \"ssi.0\",\n+\t\t\t\t \"src.9\", \"src.8\", \"src.7\", \"src.6\",\n+\t\t\t\t \"src.5\", \"src.4\", \"src.3\", \"src.2\",\n+\t\t\t\t \"src.1\", \"src.0\",\n+\t\t\t\t \"mix.1\", \"mix.0\",\n+\t\t\t\t \"ctu.1\", \"ctu.0\",\n+\t\t\t\t \"dvc.0\", \"dvc.1\",\n+\t\t\t\t \"clk_a\", \"clk_b\", \"clk_c\", \"clk_i\";\n+\t\t\tpower-domains = <&sysc R8A7796_PD_ALWAYS_ON>;\n+\t\t\tresets = <&cpg 1005>,\n+\t\t\t\t <&cpg 1006>, <&cpg 1007>,\n+\t\t\t\t <&cpg 1008>, <&cpg 1009>,\n+\t\t\t\t <&cpg 1010>, <&cpg 1011>,\n+\t\t\t\t <&cpg 1012>, <&cpg 1013>,\n+\t\t\t\t <&cpg 1014>, <&cpg 1015>;\n+\t\t\treset-names = \"ssi-all\",\n+\t\t\t\t \"ssi.9\", \"ssi.8\", \"ssi.7\", \"ssi.6\",\n+\t\t\t\t \"ssi.5\", \"ssi.4\", \"ssi.3\", \"ssi.2\",\n+\t\t\t\t \"ssi.1\", \"ssi.0\";\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\trcar_sound,dvc {\n+\t\t\t\tdvc0: dvc-0 {\n+\t\t\t\t\tdmas = <&audma1 0xbc>;\n+\t\t\t\t\tdma-names = \"tx\";\n+\t\t\t\t};\n+\t\t\t\tdvc1: dvc-1 {\n+\t\t\t\t\tdmas = <&audma1 0xbe>;\n+\t\t\t\t\tdma-names = \"tx\";\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\trcar_sound,mix {\n+\t\t\t\tmix0: mix-0 { };\n+\t\t\t\tmix1: mix-1 { };\n+\t\t\t};\n+\n+\t\t\trcar_sound,ctu {\n+\t\t\t\tctu00: ctu-0 { };\n+\t\t\t\tctu01: ctu-1 { };\n+\t\t\t\tctu02: ctu-2 { };\n+\t\t\t\tctu03: ctu-3 { };\n+\t\t\t\tctu10: ctu-4 { };\n+\t\t\t\tctu11: ctu-5 { };\n+\t\t\t\tctu12: ctu-6 { };\n+\t\t\t\tctu13: ctu-7 { };\n+\t\t\t};\n+\n+\t\t\trcar_sound,src {\n+\t\t\t\tsrc0: src-0 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x85>, <&audma1 0x9a>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc1: src-1 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x87>, <&audma1 0x9c>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc2: src-2 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x89>, <&audma1 0x9e>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc3: src-3 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x8b>, <&audma1 0xa0>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc4: src-4 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x8d>, <&audma1 0xb0>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc5: src-5 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x8f>, <&audma1 0xb2>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc6: src-6 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x91>, <&audma1 0xb4>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc7: src-7 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x93>, <&audma1 0xb6>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc8: src-8 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x95>, <&audma1 0xb8>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t\tsrc9: src-9 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x97>, <&audma1 0xba>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\";\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\trcar_sound,ssi {\n+\t\t\t\tssi0: ssi-0 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi1: ssi-1 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi2: ssi-2 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi3: ssi-3 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi4: ssi-4 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi5: ssi-5 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi6: ssi-6 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi7: ssi-7 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi8: ssi-8 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t\tssi9: ssi-9 {\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\tdmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;\n+\t\t\t\t\tdma-names = \"rx\", \"tx\", \"rxu\", \"txu\";\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\n+\t\tpciec0: pcie@fe000000 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tpciec1: pcie@ee800000 {\n+\t\t\t/* placeholder */\n+\t\t};\n+\n+\t\tdu: display@feb00000 {\n+\t\t\t/* placeholder */\n+\n+\t\t\tports {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\n+\t\t\t\tport@0 {\n+\t\t\t\t\treg = <0>;\n+\t\t\t\t\tdu_out_rgb: endpoint {\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n \t};\n };\ndiff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi\nnew file mode 100644\nindex 0000000000..f903957da5\n--- /dev/null\n+++ b/arch/arm/dts/salvator-common.dtsi\n@@ -0,0 +1,629 @@\n+/*\n+ * Device Tree Source for common parts of Salvator-X board variants\n+ *\n+ * Copyright (C) 2015-2016 Renesas Electronics Corp.\n+ *\n+ * This file is licensed under the terms of the GNU General Public License\n+ * version 2. This program is licensed \"as is\" without any warranty of any\n+ * kind, whether express or implied.\n+ */\n+\n+/*\n+ * SSI-AK4613\n+ *\n+ * This command is required when Playback/Capture\n+ *\n+ *\tamixer set \"DVC Out\" 100%\n+ *\tamixer set \"DVC In\" 100%\n+ *\n+ * You can use Mute\n+ *\n+ *\tamixer set \"DVC Out Mute\" on\n+ *\tamixer set \"DVC In Mute\" on\n+ *\n+ * You can use Volume Ramp\n+ *\n+ *\tamixer set \"DVC Out Ramp Up Rate\" \"0.125 dB/64 steps\"\n+ *\tamixer set \"DVC Out Ramp Down Rate\" \"0.125 dB/512 steps\"\n+ *\tamixer set \"DVC Out Ramp\" on\n+ *\taplay xxx.wav &\n+ *\tamixer set \"DVC Out\" 80% // Volume Down\n+ *\tamixer set \"DVC Out\" 100% // Volume Up\n+ */\n+\n+#include \n+\n+/ {\n+\taliases {\n+\t\tserial0 = &scif2;\n+\t\tserial1 = &scif1;\n+\t\tethernet0 = &avb;\n+\t};\n+\n+\tchosen {\n+\t\tbootargs = \"ignore_loglevel rw root=/dev/nfs ip=dhcp\";\n+\t\tstdout-path = \"serial0:115200n8\";\n+\t};\n+\n+\taudio_clkout: audio-clkout {\n+\t\t/*\n+\t\t * This is same as <&rcar_sound 0>\n+\t\t * but needed to avoid cs2000/rcar_sound probe dead-lock\n+\t\t */\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <11289600>;\n+\t};\n+\n+\tbacklight: backlight {\n+\t\tcompatible = \"pwm-backlight\";\n+\t\tpwms = <&pwm1 0 50000>;\n+\n+\t\tbrightness-levels = <256 128 64 16 8 4 0>;\n+\t\tdefault-brightness-level = <6>;\n+\n+\t\tenable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;\n+\t};\n+\n+\treg_1p8v: regulator0 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"fixed-1.8V\";\n+\t\tregulator-min-microvolt = <1800000>;\n+\t\tregulator-max-microvolt = <1800000>;\n+\t\tregulator-boot-on;\n+\t\tregulator-always-on;\n+\t};\n+\n+\treg_3p3v: regulator1 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"fixed-3.3V\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\t\tregulator-boot-on;\n+\t\tregulator-always-on;\n+\t};\n+\n+\trsnd_ak4613: sound {\n+\t\tcompatible = \"simple-audio-card\";\n+\n+\t\tsimple-audio-card,format = \"left_j\";\n+\t\tsimple-audio-card,bitclock-master = <&sndcpu>;\n+\t\tsimple-audio-card,frame-master = <&sndcpu>;\n+\n+\t\tsndcpu: simple-audio-card,cpu {\n+\t\t\tsound-dai = <&rcar_sound>;\n+\t\t};\n+\n+\t\tsndcodec: simple-audio-card,codec {\n+\t\t\tsound-dai = <&ak4613>;\n+\t\t};\n+\t};\n+\n+\tvbus0_usb2: regulator-vbus0-usb2 {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"USB20_VBUS0\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\n+\t\tgpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tvcc_sdhi0: regulator-vcc-sdhi0 {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"SDHI0 Vcc\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tvccq_sdhi0: regulator-vccq-sdhi0 {\n+\t\tcompatible = \"regulator-gpio\";\n+\n+\t\tregulator-name = \"SDHI0 VccQ\";\n+\t\tregulator-min-microvolt = <1800000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;\n+\t\tgpios-states = <1>;\n+\t\tstates = <3300000 1\n+\t\t\t 1800000 0>;\n+\t};\n+\n+\tvcc_sdhi3: regulator-vcc-sdhi3 {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"SDHI3 Vcc\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tvccq_sdhi3: regulator-vccq-sdhi3 {\n+\t\tcompatible = \"regulator-gpio\";\n+\n+\t\tregulator-name = \"SDHI3 VccQ\";\n+\t\tregulator-min-microvolt = <1800000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;\n+\t\tgpios-states = <1>;\n+\t\tstates = <3300000 1\n+\t\t\t 1800000 0>;\n+\t};\n+\n+\thdmi0-out {\n+\t\tcompatible = \"hdmi-connector\";\n+\t\tlabel = \"HDMI0 OUT\";\n+\t\ttype = \"a\";\n+\n+\t\tport {\n+\t\t\thdmi0_con: endpoint {\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\thdmi1-out {\n+\t\tcompatible = \"hdmi-connector\";\n+\t\tlabel = \"HDMI1 OUT\";\n+\t\ttype = \"a\";\n+\n+\t\tport {\n+\t\t\thdmi1_con: endpoint {\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\tvga {\n+\t\tcompatible = \"vga-connector\";\n+\n+\t\tport {\n+\t\t\tvga_in: endpoint {\n+\t\t\t\tremote-endpoint = <&adv7123_out>;\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\tvga-encoder {\n+\t\tcompatible = \"adi,adv7123\";\n+\n+\t\tports {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tport@0 {\n+\t\t\t\treg = <0>;\n+\t\t\t\tadv7123_in: endpoint {\n+\t\t\t\t\tremote-endpoint = <&du_out_rgb>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t\tport@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\tadv7123_out: endpoint {\n+\t\t\t\t\tremote-endpoint = <&vga_in>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\tx12_clk: x12 {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <24576000>;\n+\t};\n+\n+\t/* External DU dot clocks */\n+\tx21_clk: x21-clock {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <33000000>;\n+\t};\n+\n+\tx22_clk: x22-clock {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <33000000>;\n+\t};\n+\n+\tx23_clk: x23-clock {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <25000000>;\n+\t};\n+};\n+\n+&audio_clk_a {\n+\tclock-frequency = <22579200>;\n+};\n+\n+&avb {\n+\tpinctrl-0 = <&avb_pins>;\n+\tpinctrl-names = \"default\";\n+\trenesas,no-ether-link;\n+\tphy-handle = <&phy0>;\n+\tstatus = \"okay\";\n+\n+\tphy0: ethernet-phy@0 {\n+\t\trxc-skew-ps = <1500>;\n+\t\treg = <0>;\n+\t\tinterrupt-parent = <&gpio2>;\n+\t\tinterrupts = <11 IRQ_TYPE_LEVEL_LOW>;\n+\t};\n+};\n+\n+&du {\n+\tpinctrl-0 = <&du_pins>;\n+\tpinctrl-names = \"default\";\n+\tstatus = \"okay\";\n+\n+\tports {\n+\t\tport@0 {\n+\t\t\tendpoint {\n+\t\t\t\tremote-endpoint = <&adv7123_in>;\n+\t\t\t};\n+\t\t};\n+\t\tport@3 {\n+\t\t\tlvds_connector: endpoint {\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&ehci0 {\n+\tstatus = \"okay\";\n+};\n+\n+&ehci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&extalr_clk {\n+\tclock-frequency = <32768>;\n+};\n+\n+&hsusb {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c2 {\n+\tpinctrl-0 = <&i2c2_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+\n+\tclock-frequency = <100000>;\n+\n+\tak4613: codec@10 {\n+\t\tcompatible = \"asahi-kasei,ak4613\";\n+\t\t#sound-dai-cells = <0>;\n+\t\treg = <0x10>;\n+\t\tclocks = <&rcar_sound 3>;\n+\n+\t\tasahi-kasei,in1-single-end;\n+\t\tasahi-kasei,in2-single-end;\n+\t\tasahi-kasei,out1-single-end;\n+\t\tasahi-kasei,out2-single-end;\n+\t\tasahi-kasei,out3-single-end;\n+\t\tasahi-kasei,out4-single-end;\n+\t\tasahi-kasei,out5-single-end;\n+\t\tasahi-kasei,out6-single-end;\n+\t};\n+\n+\tcs2000: clk_multiplier@4f {\n+\t\t#clock-cells = <0>;\n+\t\tcompatible = \"cirrus,cs2000-cp\";\n+\t\treg = <0x4f>;\n+\t\tclocks = <&audio_clkout>, <&x12_clk>;\n+\t\tclock-names = \"clk_in\", \"ref_clk\";\n+\n+\t\tassigned-clocks = <&cs2000>;\n+\t\tassigned-clock-rates = <24576000>; /* 1/1 divide */\n+\t};\n+};\n+\n+&i2c4 {\n+\tstatus = \"okay\";\n+\n+\tcsa_vdd: adc@7c {\n+\t\tcompatible = \"maxim,max9611\";\n+\t\treg = <0x7c>;\n+\n+\t\tshunt-resistor-micro-ohms = <5000>;\n+\t};\n+\n+\tcsa_dvfs: adc@7f {\n+\t\tcompatible = \"maxim,max9611\";\n+\t\treg = <0x7f>;\n+\n+\t\tshunt-resistor-micro-ohms = <5000>;\n+\t};\n+};\n+\n+&i2c_dvfs {\n+\tstatus = \"okay\";\n+};\n+\n+&ohci0 {\n+\tstatus = \"okay\";\n+};\n+\n+&ohci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&pcie_bus_clk {\n+\tclock-frequency = <100000000>;\n+};\n+\n+&pciec0 {\n+\tstatus = \"okay\";\n+};\n+\n+&pciec1 {\n+\tstatus = \"okay\";\n+};\n+\n+&pfc {\n+\tpinctrl-0 = <&scif_clk_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tavb_pins: avb {\n+\t\tmux {\n+\t\t\tgroups = \"avb_link\", \"avb_phy_int\", \"avb_mdc\",\n+\t\t\t\t \"avb_mii\";\n+\t\t\tfunction = \"avb\";\n+\t\t};\n+\n+\t\tpins_mdc {\n+\t\t\tgroups = \"avb_mdc\";\n+\t\t\tdrive-strength = <24>;\n+\t\t};\n+\n+\t\tpins_mii_tx {\n+\t\t\tpins = \"PIN_AVB_TX_CTL\", \"PIN_AVB_TXC\", \"PIN_AVB_TD0\",\n+\t\t\t \"PIN_AVB_TD1\", \"PIN_AVB_TD2\", \"PIN_AVB_TD3\";\n+\t\t\tdrive-strength = <12>;\n+\t\t};\n+\t};\n+\n+\tdu_pins: du {\n+\t\tgroups = \"du_rgb888\", \"du_sync\", \"du_oddf\", \"du_clk_out_0\";\n+\t\tfunction = \"du\";\n+\t};\n+\n+\ti2c2_pins: i2c2 {\n+\t\tgroups = \"i2c2_a\";\n+\t\tfunction = \"i2c2\";\n+\t};\n+\n+\tpwm1_pins: pwm1 {\n+\t\tgroups = \"pwm1_a\";\n+\t\tfunction = \"pwm1\";\n+\t};\n+\n+\tscif1_pins: scif1 {\n+\t\tgroups = \"scif1_data_a\", \"scif1_ctrl\";\n+\t\tfunction = \"scif1\";\n+\t};\n+\n+\tscif2_pins: scif2 {\n+\t\tgroups = \"scif2_data_a\";\n+\t\tfunction = \"scif2\";\n+\t};\n+\n+\tscif_clk_pins: scif_clk {\n+\t\tgroups = \"scif_clk_a\";\n+\t\tfunction = \"scif_clk\";\n+\t};\n+\n+\tsdhi0_pins: sd0 {\n+\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n+\t\tfunction = \"sdhi0\";\n+\t\tpower-source = <3300>;\n+\t};\n+\n+\tsdhi0_pins_uhs: sd0_uhs {\n+\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n+\t\tfunction = \"sdhi0\";\n+\t\tpower-source = <1800>;\n+\t};\n+\n+\tsdhi2_pins: sd2 {\n+\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n+\t\tfunction = \"sdhi2\";\n+\t\tpower-source = <3300>;\n+\t};\n+\n+\tsdhi2_pins_uhs: sd2_uhs {\n+\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n+\t\tfunction = \"sdhi2\";\n+\t\tpower-source = <1800>;\n+\t};\n+\n+\tsdhi3_pins: sd3 {\n+\t\tgroups = \"sdhi3_data4\", \"sdhi3_ctrl\";\n+\t\tfunction = \"sdhi3\";\n+\t\tpower-source = <3300>;\n+\t};\n+\n+\tsdhi3_pins_uhs: sd3_uhs {\n+\t\tgroups = \"sdhi3_data4\", \"sdhi3_ctrl\";\n+\t\tfunction = \"sdhi3\";\n+\t\tpower-source = <1800>;\n+\t};\n+\n+\tsound_pins: sound {\n+\t\tgroups = \"ssi01239_ctrl\", \"ssi0_data\", \"ssi1_data_a\";\n+\t\tfunction = \"ssi\";\n+\t};\n+\n+\tsound_clk_pins: sound_clk {\n+\t\tgroups = \"audio_clk_a_a\", \"audio_clk_b_a\", \"audio_clk_c_a\",\n+\t\t\t \"audio_clkout_a\", \"audio_clkout3_a\";\n+\t\tfunction = \"audio_clk\";\n+\t};\n+\n+\tusb0_pins: usb0 {\n+\t\tgroups = \"usb0\";\n+\t\tfunction = \"usb0\";\n+\t};\n+\n+\tusb1_pins: usb1 {\n+\t\tmux {\n+\t\t\tgroups = \"usb1\";\n+\t\t\tfunction = \"usb1\";\n+\t\t};\n+\n+\t\tovc {\n+\t\t\tpins = \"GP_6_27\";\n+\t\t\tbias-pull-up;\n+\t\t};\n+\n+\t\tpwen {\n+\t\t\tpins = \"GP_6_26\";\n+\t\t\tbias-pull-down;\n+\t\t};\n+\t};\n+};\n+\n+&pwm1 {\n+\tpinctrl-0 = <&pwm1_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&rcar_sound {\n+\tpinctrl-0 = <&sound_pins &sound_clk_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\t/* Single DAI */\n+\t#sound-dai-cells = <0>;\n+\n+\t/* audio_clkout0/1/2/3 */\n+\t#clock-cells = <1>;\n+\tclock-frequency = <12288000 11289600>;\n+\n+\tstatus = \"okay\";\n+\n+\t/* update to */\n+\tclocks = <&cpg CPG_MOD 1005>,\n+\t\t <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,\n+\t\t <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,\n+\t\t <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,\n+\t\t <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,\n+\t\t <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,\n+\t\t <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,\n+\t\t <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,\n+\t\t <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,\n+\t\t <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,\n+\t\t <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,\n+\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n+\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n+\t\t <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,\n+\t\t <&audio_clk_a>, <&cs2000>,\n+\t\t <&audio_clk_c>,\n+\t\t <&cpg CPG_CORE CPG_AUDIO_CLK_I>;\n+\n+\trcar_sound,dai {\n+\t\tdai0 {\n+\t\t\tplayback = <&ssi0 &src0 &dvc0>;\n+\t\t\tcapture = <&ssi1 &src1 &dvc1>;\n+\t\t};\n+\t};\n+};\n+\n+&scif1 {\n+\tpinctrl-0 = <&scif1_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tuart-has-rtscts;\n+\tstatus = \"okay\";\n+};\n+\n+&scif2 {\n+\tpinctrl-0 = <&scif2_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&scif_clk {\n+\tclock-frequency = <14745600>;\n+};\n+\n+&sdhi0 {\n+\tpinctrl-0 = <&sdhi0_pins>;\n+\tpinctrl-1 = <&sdhi0_pins_uhs>;\n+\tpinctrl-names = \"default\", \"state_uhs\";\n+\n+\tvmmc-supply = <&vcc_sdhi0>;\n+\tvqmmc-supply = <&vccq_sdhi0>;\n+\tcd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;\n+\twp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;\n+\tbus-width = <4>;\n+\tsd-uhs-sdr50;\n+\tstatus = \"okay\";\n+};\n+\n+&sdhi2 {\n+\t/* used for on-board 8bit eMMC */\n+\tpinctrl-0 = <&sdhi2_pins>;\n+\tpinctrl-1 = <&sdhi2_pins_uhs>;\n+\tpinctrl-names = \"default\", \"state_uhs\";\n+\n+\tvmmc-supply = <®_3p3v>;\n+\tvqmmc-supply = <®_1p8v>;\n+\tbus-width = <8>;\n+\tmmc-hs200-1_8v;\n+\tnon-removable;\n+\tstatus = \"okay\";\n+};\n+\n+&sdhi3 {\n+\tpinctrl-0 = <&sdhi3_pins>;\n+\tpinctrl-1 = <&sdhi3_pins_uhs>;\n+\tpinctrl-names = \"default\", \"state_uhs\";\n+\n+\tvmmc-supply = <&vcc_sdhi3>;\n+\tvqmmc-supply = <&vccq_sdhi3>;\n+\tcd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;\n+\twp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;\n+\tbus-width = <4>;\n+\tsd-uhs-sdr50;\n+\tstatus = \"okay\";\n+};\n+\n+&ssi1 {\n+\tshared-pin;\n+};\n+\n+&usb2_phy0 {\n+\tpinctrl-0 = <&usb0_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tvbus-supply = <&vbus0_usb2>;\n+\tstatus = \"okay\";\n+};\n+\n+&usb2_phy1 {\n+\tpinctrl-0 = <&usb1_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&wdt0 {\n+\ttimeout-sec = <60>;\n+\tstatus = \"okay\";\n+};\n+\n+&xhci0 {\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm/dts/salvator-x.dtsi b/arch/arm/dts/salvator-x.dtsi\nnew file mode 100644\nindex 0000000000..468868c8ed\n--- /dev/null\n+++ b/arch/arm/dts/salvator-x.dtsi\n@@ -0,0 +1,30 @@\n+/*\n+ * Device Tree Source for the Salvator-X board\n+ *\n+ * Copyright (C) 2015-2016 Renesas Electronics Corp.\n+ *\n+ * This file is licensed under the terms of the GNU General Public License\n+ * version 2. This program is licensed \"as is\" without any warranty of any\n+ * kind, whether express or implied.\n+ */\n+\n+#include \"salvator-common.dtsi\"\n+\n+/ {\n+\tmodel = \"Renesas Salvator-X board\";\n+\tcompatible = \"renesas,salvator-x\";\n+};\n+\n+&extal_clk {\n+\tclock-frequency = <16666666>;\n+};\n+\n+&i2c4 {\n+\tversaclock5: clock-generator@6a {\n+\t\tcompatible = \"idt,5p49v5923\";\n+\t\treg = <0x6a>;\n+\t\t#clock-cells = <1>;\n+\t\tclocks = <&x23_clk>;\n+\t\tclock-names = \"xin\";\n+\t};\n+};\ndiff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi\nnew file mode 100644\nindex 0000000000..d1a3f3b7a0\n--- /dev/null\n+++ b/arch/arm/dts/ulcb.dtsi\n@@ -0,0 +1,367 @@\n+/*\n+ * Device Tree Source for the R-Car Gen3 ULCB board\n+ *\n+ * Copyright (C) 2016 Renesas Electronics Corp.\n+ * Copyright (C) 2016 Cogent Embedded, Inc.\n+ *\n+ * This file is licensed under the terms of the GNU General Public License\n+ * version 2. This program is licensed \"as is\" without any warranty of any\n+ * kind, whether express or implied.\n+ */\n+\n+#include \n+#include \n+\n+/ {\n+\tmodel = \"Renesas R-Car Gen3 ULCB board\";\n+\n+\taliases {\n+\t\tserial0 = &scif2;\n+\t\tethernet0 = &avb;\n+\t};\n+\n+\tchosen {\n+\t\tstdout-path = \"serial0:115200n8\";\n+\t};\n+\n+\taudio_clkout: audio-clkout {\n+\t\t/*\n+\t\t * This is same as <&rcar_sound 0>\n+\t\t * but needed to avoid cs2000/rcar_sound probe dead-lock\n+\t\t */\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <11289600>;\n+\t};\n+\n+\tkeyboard {\n+\t\tcompatible = \"gpio-keys\";\n+\n+\t\tkey-1 {\n+\t\t\tlinux,code = ;\n+\t\t\tlabel = \"SW3\";\n+\t\t\twakeup-source;\n+\t\t\tdebounce-interval = <20>;\n+\t\t\tgpios = <&gpio6 11 GPIO_ACTIVE_LOW>;\n+\t\t};\n+\t};\n+\n+\tleds {\n+\t\tcompatible = \"gpio-leds\";\n+\n+\t\tled5 {\n+\t\t\tgpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;\n+\t\t};\n+\t\tled6 {\n+\t\t\tgpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;\n+\t\t};\n+\t};\n+\n+\treg_1p8v: regulator0 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"fixed-1.8V\";\n+\t\tregulator-min-microvolt = <1800000>;\n+\t\tregulator-max-microvolt = <1800000>;\n+\t\tregulator-boot-on;\n+\t\tregulator-always-on;\n+\t};\n+\n+\treg_3p3v: regulator1 {\n+\t\tcompatible = \"regulator-fixed\";\n+\t\tregulator-name = \"fixed-3.3V\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\t\tregulator-boot-on;\n+\t\tregulator-always-on;\n+\t};\n+\n+\trsnd_ak4613: sound {\n+\t\tcompatible = \"simple-audio-card\";\n+\n+\t\tsimple-audio-card,format = \"left_j\";\n+\t\tsimple-audio-card,bitclock-master = <&sndcpu>;\n+\t\tsimple-audio-card,frame-master = <&sndcpu>;\n+\n+\t\tsndcpu: simple-audio-card,cpu {\n+\t\t\tsound-dai = <&rcar_sound>;\n+\t\t};\n+\n+\t\tsndcodec: simple-audio-card,codec {\n+\t\t\tsound-dai = <&ak4613>;\n+\t\t};\n+\t};\n+\n+\tvcc_sdhi0: regulator-vcc-sdhi0 {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"SDHI0 Vcc\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\t};\n+\n+\tvccq_sdhi0: regulator-vccq-sdhi0 {\n+\t\tcompatible = \"regulator-gpio\";\n+\n+\t\tregulator-name = \"SDHI0 VccQ\";\n+\t\tregulator-min-microvolt = <1800000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;\n+\t\tgpios-states = <1>;\n+\t\tstates = <3300000 1\n+\t\t\t 1800000 0>;\n+\t};\n+\n+\tx12_clk: x12 {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <24576000>;\n+\t};\n+};\n+\n+&audio_clk_a {\n+\tclock-frequency = <22579200>;\n+};\n+\n+&avb {\n+\tpinctrl-0 = <&avb_pins>;\n+\tpinctrl-names = \"default\";\n+\trenesas,no-ether-link;\n+\tphy-handle = <&phy0>;\n+\tstatus = \"okay\";\n+\n+\tphy0: ethernet-phy@0 {\n+\t\trxc-skew-ps = <1500>;\n+\t\treg = <0>;\n+\t\tinterrupt-parent = <&gpio2>;\n+\t\tinterrupts = <11 IRQ_TYPE_LEVEL_LOW>;\n+\t};\n+};\n+\n+&ehci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&extal_clk {\n+\tclock-frequency = <16666666>;\n+};\n+\n+&extalr_clk {\n+\tclock-frequency = <32768>;\n+};\n+\n+&i2c2 {\n+\tpinctrl-0 = <&i2c2_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+\n+\tclock-frequency = <100000>;\n+\n+\tak4613: codec@10 {\n+\t\tcompatible = \"asahi-kasei,ak4613\";\n+\t\t#sound-dai-cells = <0>;\n+\t\treg = <0x10>;\n+\t\tclocks = <&rcar_sound 3>;\n+\n+\t\tasahi-kasei,in1-single-end;\n+\t\tasahi-kasei,in2-single-end;\n+\t\tasahi-kasei,out1-single-end;\n+\t\tasahi-kasei,out2-single-end;\n+\t\tasahi-kasei,out3-single-end;\n+\t\tasahi-kasei,out4-single-end;\n+\t\tasahi-kasei,out5-single-end;\n+\t\tasahi-kasei,out6-single-end;\n+\t};\n+\n+\tcs2000: clk-multiplier@4f {\n+\t\t#clock-cells = <0>;\n+\t\tcompatible = \"cirrus,cs2000-cp\";\n+\t\treg = <0x4f>;\n+\t\tclocks = <&audio_clkout>, <&x12_clk>;\n+\t\tclock-names = \"clk_in\", \"ref_clk\";\n+\n+\t\tassigned-clocks = <&cs2000>;\n+\t\tassigned-clock-rates = <24576000>; /* 1/1 divide */\n+\t};\n+};\n+\n+&ohci1 {\n+\tstatus = \"okay\";\n+};\n+\n+&pfc {\n+\tpinctrl-0 = <&scif_clk_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tavb_pins: avb {\n+\t\tmux {\n+\t\t\tgroups = \"avb_link\", \"avb_phy_int\", \"avb_mdc\",\n+\t\t\t\t \"avb_mii\";\n+\t\t\tfunction = \"avb\";\n+\t\t};\n+\n+\t\tpins_mdc {\n+\t\t\tgroups = \"avb_mdc\";\n+\t\t\tdrive-strength = <24>;\n+\t\t};\n+\n+\t\tpins_mii_tx {\n+\t\t\tpins = \"PIN_AVB_TX_CTL\", \"PIN_AVB_TXC\", \"PIN_AVB_TD0\",\n+\t\t\t \"PIN_AVB_TD1\", \"PIN_AVB_TD2\", \"PIN_AVB_TD3\";\n+\t\t\tdrive-strength = <12>;\n+\t\t};\n+\t};\n+\n+\ti2c2_pins: i2c2 {\n+\t\tgroups = \"i2c2_a\";\n+\t\tfunction = \"i2c2\";\n+\t};\n+\n+\tscif2_pins: scif2 {\n+\t\tgroups = \"scif2_data_a\";\n+\t\tfunction = \"scif2\";\n+\t};\n+\n+\tscif_clk_pins: scif_clk {\n+\t\tgroups = \"scif_clk_a\";\n+\t\tfunction = \"scif_clk\";\n+\t};\n+\n+\tsdhi0_pins: sd0 {\n+\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n+\t\tfunction = \"sdhi0\";\n+\t\tpower-source = <3300>;\n+\t};\n+\n+\tsdhi0_pins_uhs: sd0_uhs {\n+\t\tgroups = \"sdhi0_data4\", \"sdhi0_ctrl\";\n+\t\tfunction = \"sdhi0\";\n+\t\tpower-source = <1800>;\n+\t};\n+\n+\tsdhi2_pins: sd2 {\n+\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n+\t\tfunction = \"sdhi2\";\n+\t\tpower-source = <3300>;\n+\t};\n+\n+\tsdhi2_pins_uhs: sd2_uhs {\n+\t\tgroups = \"sdhi2_data8\", \"sdhi2_ctrl\";\n+\t\tfunction = \"sdhi2\";\n+\t\tpower-source = <1800>;\n+\t};\n+\n+\tsound_pins: sound {\n+\t\tgroups = \"ssi01239_ctrl\", \"ssi0_data\", \"ssi1_data_a\";\n+\t\tfunction = \"ssi\";\n+\t};\n+\n+\tsound_clk_pins: sound-clk {\n+\t\tgroups = \"audio_clk_a_a\", \"audio_clk_b_a\", \"audio_clk_c_a\",\n+\t\t\t \"audio_clkout_a\", \"audio_clkout3_a\";\n+\t\tfunction = \"audio_clk\";\n+\t};\n+\n+\tusb1_pins: usb1 {\n+\t\tgroups = \"usb1\";\n+\t\tfunction = \"usb1\";\n+\t};\n+};\n+\n+&rcar_sound {\n+\tpinctrl-0 = <&sound_pins &sound_clk_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\t/* Single DAI */\n+\t#sound-dai-cells = <0>;\n+\n+\t/* audio_clkout0/1/2/3 */\n+\t#clock-cells = <1>;\n+\tclock-frequency = <12288000 11289600>;\n+\n+\tstatus = \"okay\";\n+\n+\t/* update to */\n+\tclocks = <&cpg CPG_MOD 1005>,\n+\t\t <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,\n+\t\t <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,\n+\t\t <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,\n+\t\t <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,\n+\t\t <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,\n+\t\t <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,\n+\t\t <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,\n+\t\t <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,\n+\t\t <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,\n+\t\t <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,\n+\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n+\t\t <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,\n+\t\t <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,\n+\t\t <&audio_clk_a>, <&cs2000>,\n+\t\t <&audio_clk_c>,\n+\t\t <&cpg CPG_CORE CPG_AUDIO_CLK_I>;\n+\n+\trcar_sound,dai {\n+\t\tdai0 {\n+\t\t\tplayback = <&ssi0 &src0 &dvc0>;\n+\t\t\tcapture = <&ssi1 &src1 &dvc1>;\n+\t\t};\n+\t};\n+};\n+\n+&scif2 {\n+\tpinctrl-0 = <&scif2_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&scif_clk {\n+\tclock-frequency = <14745600>;\n+};\n+\n+&sdhi0 {\n+\tpinctrl-0 = <&sdhi0_pins>;\n+\tpinctrl-1 = <&sdhi0_pins_uhs>;\n+\tpinctrl-names = \"default\", \"state_uhs\";\n+\n+\tvmmc-supply = <&vcc_sdhi0>;\n+\tvqmmc-supply = <&vccq_sdhi0>;\n+\tcd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;\n+\tbus-width = <4>;\n+\tsd-uhs-sdr50;\n+\tstatus = \"okay\";\n+};\n+\n+&sdhi2 {\n+\t/* used for on-board 8bit eMMC */\n+\tpinctrl-0 = <&sdhi2_pins>;\n+\tpinctrl-1 = <&sdhi2_pins_uhs>;\n+\tpinctrl-names = \"default\", \"state_uhs\";\n+\n+\tvmmc-supply = <®_3p3v>;\n+\tvqmmc-supply = <®_1p8v>;\n+\tbus-width = <8>;\n+\tmmc-hs200-1_8v;\n+\tnon-removable;\n+\tstatus = \"okay\";\n+};\n+\n+&ssi1 {\n+\tshared-pin;\n+};\n+\n+&usb2_phy1 {\n+\tpinctrl-0 = <&usb1_pins>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&wdt0 {\n+\ttimeout-sec = <60>;\n+\tstatus = \"okay\";\n+};\n","prefixes":["U-Boot"]}