{"id":812992,"url":"http://patchwork.ozlabs.org/api/patches/812992/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1505240046-11454-4-git-send-email-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505240046-11454-4-git-send-email-peter.maydell@linaro.org>","list_archive_url":null,"date":"2017-09-12T18:13:50","name":"[03/19] nvic: Add cached vectpending_is_s_banked state","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"65152310c6bd42b405e3d40f722ec3dd36b0c1fa","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1505240046-11454-4-git-send-email-peter.maydell@linaro.org/mbox/","series":[{"id":2751,"url":"http://patchwork.ozlabs.org/api/series/2751/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2751","date":"2017-09-12T18:13:53","name":"ARMv8M: support security extn in the NVIC","version":1,"mbox":"http://patchwork.ozlabs.org/series/2751/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812992/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812992/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsChk2d5jz9sNV\n\tfor ;\n\tWed, 13 Sep 2017 04:18:14 +1000 (AEST)","from localhost ([::1]:37964 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1drplE-0006qJ-Dj\n\tfor incoming@patchwork.ozlabs.org; Tue, 12 Sep 2017 14:18:12 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:43244)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1drpgx-0003MF-9i\n\tfor qemu-devel@nongnu.org; Tue, 12 Sep 2017 14:13:48 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1drpgw-0006NK-4P\n\tfor qemu-devel@nongnu.org; Tue, 12 Sep 2017 14:13:47 -0400","from orth.archaic.org.uk ([2001:8b0:1d0::2]:37276)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1drpgt-0006IX-Kg; Tue, 12 Sep 2017 14:13:43 -0400","from pm215 by orth.archaic.org.uk with local (Exim 4.89)\n\t(envelope-from )\n\tid 1drpgr-00013V-Hy; Tue, 12 Sep 2017 19:13:41 +0100"],"From":"Peter Maydell ","To":"qemu-arm@nongnu.org,\n\tqemu-devel@nongnu.org","Date":"Tue, 12 Sep 2017 19:13:50 +0100","Message-Id":"<1505240046-11454-4-git-send-email-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1505240046-11454-1-git-send-email-peter.maydell@linaro.org>","References":"<1505240046-11454-1-git-send-email-peter.maydell@linaro.org>","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2001:8b0:1d0::2","Subject":"[Qemu-devel] [PATCH 03/19] nvic: Add cached vectpending_is_s_banked\n\tstate","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"patches@linaro.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"With banked exceptions, just the exception number in\ns->vectpending is no longer sufficient to uniquely identify\nthe pending exception. Add a vectpending_is_s_banked bool\nwhich is true if the exception is using the sec_vectors[]\narray.\n\nSigned-off-by: Peter Maydell \n---\n include/hw/intc/armv7m_nvic.h | 11 +++++++++--\n hw/intc/armv7m_nvic.c | 1 +\n 2 files changed, 10 insertions(+), 2 deletions(-)","diff":"diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h\nindex 317601e..87c78b3 100644\n--- a/include/hw/intc/armv7m_nvic.h\n+++ b/include/hw/intc/armv7m_nvic.h\n@@ -57,10 +57,17 @@ typedef struct NVICState {\n VecInfo sec_vectors[NVIC_INTERNAL_VECTORS];\n uint32_t prigroup;\n \n- /* vectpending and exception_prio are both cached state that can\n- * be recalculated from the vectors[] array and the prigroup field.\n+ /* The following fields are all cached state that can be recalculated\n+ * from the vectors[] and sec_vectors[] arrays and the prigroup field:\n+ * - vectpending\n+ * - vectpending_is_secure\n+ * - exception_prio\n */\n unsigned int vectpending; /* highest prio pending enabled exception */\n+ /* true if vectpending is a banked secure exception, ie it is in\n+ * sec_vectors[] rather than vectors[]\n+ */\n+ bool vectpending_is_s_banked;\n int exception_prio; /* group prio of the highest prio active exception */\n \n MemoryRegion sysregmem;\ndiff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c\nindex 694b9e0..417a456 100644\n--- a/hw/intc/armv7m_nvic.c\n+++ b/hw/intc/armv7m_nvic.c\n@@ -1250,6 +1250,7 @@ static void armv7m_nvic_reset(DeviceState *dev)\n \n s->exception_prio = NVIC_NOEXC_PRIO;\n s->vectpending = 0;\n+ s->vectpending_is_s_banked = false;\n }\n \n static void nvic_systick_trigger(void *opaque, int n, int level)\n","prefixes":["03/19"]}