{"id":812729,"url":"http://patchwork.ozlabs.org/api/patches/812729/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/1505205657-18012-5-git-send-email-geert+renesas@glider.be/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505205657-18012-5-git-send-email-geert+renesas@glider.be>","list_archive_url":null,"date":"2017-09-12T08:40:57","name":"[v2,resend,4/4] sh: sh7269: Remove nonexistent GPIO_PH[0-7] to fix pinctrl registration","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0599b3ae1ef86616ee6457fbe41476d097639dad","submitter":{"id":63808,"url":"http://patchwork.ozlabs.org/api/people/63808/?format=json","name":"Geert Uytterhoeven","email":"geert+renesas@glider.be"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/1505205657-18012-5-git-send-email-geert+renesas@glider.be/mbox/","series":[{"id":2634,"url":"http://patchwork.ozlabs.org/api/series/2634/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=2634","date":"2017-09-12T08:40:55","name":"sh: sh7722/sh7757i/sh7264/sh7269: Fix pinctrl registration","version":2,"mbox":"http://patchwork.ozlabs.org/series/2634/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812729/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812729/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xryvv4Z6bz9s81\n\tfor ;\n\tTue, 12 Sep 2017 18:42:03 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751312AbdILImC (ORCPT );\n\tTue, 12 Sep 2017 04:42:02 -0400","from andre.telenet-ops.be ([195.130.132.53]:44202 \"EHLO\n\tandre.telenet-ops.be\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751320AbdILIlD (ORCPT\n\t); Tue, 12 Sep 2017 04:41:03 -0400","from ayla.of.borg ([84.195.106.246])\n\tby andre.telenet-ops.be with bizsmtp\n\tid 8Ygz1w00s5JzmfG01Ygzb9; Tue, 12 Sep 2017 10:41:02 +0200","from ramsan.of.borg ([192.168.97.29] helo=ramsan)\n\tby ayla.of.borg with esmtp (Exim 4.86_2)\n\t(envelope-from )\n\tid 1drgkZ-0003Y9-Gu; Tue, 12 Sep 2017 10:40:55 +0200","from geert by ramsan with local (Exim 4.86_2)\n\t(envelope-from )\n\tid 1drgkd-0004hY-PG; Tue, 12 Sep 2017 10:40:59 +0200"],"From":"Geert Uytterhoeven ","To":"Andrew Morton ","Cc":"Yoshinori Sato ,\n\tRich Felker , Magnus Damm ,\n\tLaurent Pinchart ,\n\tYoshihiro Shimoda ,\n\tlinux-sh@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tGeert Uytterhoeven ","Subject":"[PATCH v2 resend 4/4] sh: sh7269: Remove nonexistent GPIO_PH[0-7]\n\tto fix pinctrl registration","Date":"Tue, 12 Sep 2017 10:40:57 +0200","Message-Id":"<1505205657-18012-5-git-send-email-geert+renesas@glider.be>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1505205657-18012-1-git-send-email-geert+renesas@glider.be>","References":"<1505205657-18012-1-git-send-email-geert+renesas@glider.be>","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"},"content":"Pinmux_pins[] is initialized through PINMUX_GPIO(), using designated\narray initializers, where the GPIO_* enums serve as indices.\nIf enum values are defined, but never used, pinmux_pins[] contains\n(zero-filled) holes. Such entries are treated as pin zero, which was\nregistered before, thus leading to pinctrl registration failures, as\nseen on sh7722:\n\n sh-pfc pfc-sh7722: pin 0 already registered\n sh-pfc pfc-sh7722: error during pin registration\n sh-pfc pfc-sh7722: could not register: -22\n sh-pfc: probe of pfc-sh7722 failed with error -22\n\nRemove GPIO_PH[0-7] from the enum to fix this.\n\nFixes: ef0fa5331a73e479 (\"sh: Add pinmux for sh7269\")\nSigned-off-by: Geert Uytterhoeven \nReviewed-by: Laurent Pinchart \n---\nUntested due to lack of hardware.\n\nv2:\n - Replace fake error messages by reference to sh7722,\n - Add Reviewed-by.\n---\n arch/sh/include/cpu-sh2a/cpu/sh7269.h | 4 +---\n 1 file changed, 1 insertion(+), 3 deletions(-)","diff":"diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/arch/sh/include/cpu-sh2a/cpu/sh7269.h\nindex 2a0ca8780f0d8c34..13c495a9fc0007b4 100644\n--- a/arch/sh/include/cpu-sh2a/cpu/sh7269.h\n+++ b/arch/sh/include/cpu-sh2a/cpu/sh7269.h\n@@ -45,9 +45,7 @@ enum {\n \tGPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,\n \tGPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,\n \n-\t/* Port H */\n-\tGPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,\n-\tGPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,\n+\t/* Port H - Port H does not have a Data Register */\n \n \t/* Port I - not on device */\n \n","prefixes":["v2","resend","4/4"]}