{"id":812725,"url":"http://patchwork.ozlabs.org/api/patches/812725/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/1505205657-18012-3-git-send-email-geert+renesas@glider.be/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505205657-18012-3-git-send-email-geert+renesas@glider.be>","list_archive_url":null,"date":"2017-09-12T08:40:55","name":"[v2,resend,2/4] sh: sh7757: Remove nonexistent GPIO_PT[JLNQ]7_RESV to fix pinctrl registration","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d0f70ad2bbc199526b44b1a37f79a32ca10ea616","submitter":{"id":63808,"url":"http://patchwork.ozlabs.org/api/people/63808/?format=json","name":"Geert Uytterhoeven","email":"geert+renesas@glider.be"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/1505205657-18012-3-git-send-email-geert+renesas@glider.be/mbox/","series":[{"id":2634,"url":"http://patchwork.ozlabs.org/api/series/2634/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=2634","date":"2017-09-12T08:40:55","name":"sh: sh7722/sh7757i/sh7264/sh7269: Fix pinctrl registration","version":2,"mbox":"http://patchwork.ozlabs.org/series/2634/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812725/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812725/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xryvR523Nz9s83\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 18:41:39 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751427AbdILIlU (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 12 Sep 2017 04:41:20 -0400","from xavier.telenet-ops.be ([195.130.132.52]:51526 \"EHLO\n\txavier.telenet-ops.be\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751357AbdILIlD (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 12 Sep 2017 04:41:03 -0400","from ayla.of.borg ([84.195.106.246])\n\tby xavier.telenet-ops.be with bizsmtp\n\tid 8Ygz1w00h5JzmfG01YgzyD; Tue, 12 Sep 2017 10:41:02 +0200","from ramsan.of.borg ([192.168.97.29] helo=ramsan)\n\tby ayla.of.borg with esmtp (Exim 4.86_2)\n\t(envelope-from <geert@linux-m68k.org>)\n\tid 1drgkZ-0003Y1-FW; Tue, 12 Sep 2017 10:40:55 +0200","from geert by ramsan with local (Exim 4.86_2)\n\t(envelope-from <geert@linux-m68k.org>)\n\tid 1drgkd-0004hO-Mf; Tue, 12 Sep 2017 10:40:59 +0200"],"From":"Geert Uytterhoeven <geert+renesas@glider.be>","To":"Andrew Morton <akpm@linux-foundation.org>","Cc":"Yoshinori Sato <ysato@users.sourceforge.jp>,\n\tRich Felker <dalias@libc.org>, Magnus Damm <magnus.damm@gmail.com>,\n\tLaurent Pinchart <laurent.pinchart@ideasonboard.com>,\n\tYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,\n\tlinux-sh@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tGeert Uytterhoeven <geert+renesas@glider.be>","Subject":"[PATCH v2 resend 2/4] sh: sh7757: Remove nonexistent\n\tGPIO_PT[JLNQ]7_RESV to fix pinctrl registration","Date":"Tue, 12 Sep 2017 10:40:55 +0200","Message-Id":"<1505205657-18012-3-git-send-email-geert+renesas@glider.be>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1505205657-18012-1-git-send-email-geert+renesas@glider.be>","References":"<1505205657-18012-1-git-send-email-geert+renesas@glider.be>","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"},"content":"Commit 3810e96056ffddf6 (\"sh: modify pinmux for SH7757 2nd cut\") renamed\nGPIO_PT[JLNQ]7 to GPIO_PT[JLNQ]7_RESV, and removed the existing users\nfrom the pinmux_pins[] array.\n\nHowever, pinmux_pins[] is initialized through PINMUX_GPIO(), using\ndesignated array initializers, where the GPIO_* enums serve as indices.\nHence entries were not really removed, but replaced by (zero-filled)\nholes.  Such entries are treated as pin zero, which was registered\nbefore, thus leading to pinctrl registration failures, as seen on\nsh7722:\n\n    sh-pfc pfc-sh7722: pin 0 already registered\n    sh-pfc pfc-sh7722: error during pin registration\n    sh-pfc pfc-sh7722: could not register: -22\n    sh-pfc: probe of pfc-sh7722 failed with error -22\n\nRemove GPIO_PT[JLNQ]7_RESV from the enum to fix this.\n\nFixes: 3810e96056ffddf6 (\"sh: modify pinmux for SH7757 2nd cut\")\nSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>\nReviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\n---\nUntested due to lack of hardware and datasheet.\n\nv2:\n  - Replace fake error messages by reference to sh7722,\n  - Add Reviewed-by.\n---\n arch/sh/include/cpu-sh4/cpu/sh7757.h | 8 ++++----\n 1 file changed, 4 insertions(+), 4 deletions(-)","diff":"diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h\nindex 5340f3bc1863c389..b40fb541e72a78ae 100644\n--- a/arch/sh/include/cpu-sh4/cpu/sh7757.h\n+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h\n@@ -40,7 +40,7 @@ enum {\n \n \t/* PTJ */\n \tGPIO_PTJ0, GPIO_PTJ1, GPIO_PTJ2, GPIO_PTJ3,\n-\tGPIO_PTJ4, GPIO_PTJ5, GPIO_PTJ6, GPIO_PTJ7_RESV,\n+\tGPIO_PTJ4, GPIO_PTJ5, GPIO_PTJ6,\n \n \t/* PTK */\n \tGPIO_PTK0, GPIO_PTK1, GPIO_PTK2, GPIO_PTK3,\n@@ -48,7 +48,7 @@ enum {\n \n \t/* PTL */\n \tGPIO_PTL0, GPIO_PTL1, GPIO_PTL2, GPIO_PTL3,\n-\tGPIO_PTL4, GPIO_PTL5, GPIO_PTL6, GPIO_PTL7_RESV,\n+\tGPIO_PTL4, GPIO_PTL5, GPIO_PTL6,\n \n \t/* PTM */\n \tGPIO_PTM0, GPIO_PTM1, GPIO_PTM2, GPIO_PTM3,\n@@ -56,7 +56,7 @@ enum {\n \n \t/* PTN */\n \tGPIO_PTN0, GPIO_PTN1, GPIO_PTN2, GPIO_PTN3,\n-\tGPIO_PTN4, GPIO_PTN5, GPIO_PTN6, GPIO_PTN7_RESV,\n+\tGPIO_PTN4, GPIO_PTN5, GPIO_PTN6,\n \n \t/* PTO */\n \tGPIO_PTO0, GPIO_PTO1, GPIO_PTO2, GPIO_PTO3,\n@@ -68,7 +68,7 @@ enum {\n \n \t/* PTQ */\n \tGPIO_PTQ0, GPIO_PTQ1, GPIO_PTQ2, GPIO_PTQ3,\n-\tGPIO_PTQ4, GPIO_PTQ5, GPIO_PTQ6, GPIO_PTQ7_RESV,\n+\tGPIO_PTQ4, GPIO_PTQ5, GPIO_PTQ6,\n \n \t/* PTR */\n \tGPIO_PTR0, GPIO_PTR1, GPIO_PTR2, GPIO_PTR3,\n","prefixes":["v2","resend","2/4"]}