{"id":812464,"url":"http://patchwork.ozlabs.org/api/patches/812464/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911171235.29331-9-clg@kaod.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170911171235.29331-9-clg@kaod.org>","list_archive_url":null,"date":"2017-09-11T17:12:22","name":"[RFC,v2,08/21] ppc/xive: describe the XIVE interrupt source flags","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c49241e8b2f196785c52ddd5315f8d66c7a4cb58","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/?format=json","name":"Cédric Le Goater","email":"clg@kaod.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911171235.29331-9-clg@kaod.org/mbox/","series":[{"id":2526,"url":"http://patchwork.ozlabs.org/api/series/2526/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2526","date":"2017-09-11T17:12:14","name":"Guest exploitation of the XIVE interrupt controller (POWER9)","version":2,"mbox":"http://patchwork.ozlabs.org/series/2526/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812464/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812464/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrZRM39Kpz9s81\n\tfor ;\n\tTue, 12 Sep 2017 03:19:27 +1000 (AEST)","from localhost ([::1]:59294 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1drSMn-0005HA-Dk\n\tfor incoming@patchwork.ozlabs.org; Mon, 11 Sep 2017 13:19:25 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:35112)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1drSHQ-0000zG-Is\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:53 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1drSHL-00048K-Kr\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:52 -0400","from 2.mo2.mail-out.ovh.net ([188.165.53.149]:38889)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1drSHL-00047l-Ez\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:47 -0400","from player770.ha.ovh.net (b6.ovh.net [213.186.33.56])\n\tby mo2.mail-out.ovh.net (Postfix) with ESMTP id 835E3AB087\n\tfor ; Mon, 11 Sep 2017 19:13:46 +0200 (CEST)","from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: clg@kaod.org)\n\tby player770.ha.ovh.net (Postfix) with ESMTPSA id 53DFF3C006C;\n\tMon, 11 Sep 2017 19:13:39 +0200 (CEST)"],"From":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","To":"qemu-ppc@nongnu.org, qemu-devel@nongnu.org,\n\tDavid Gibson ,\n\tBenjamin Herrenschmidt ,\n\tAlexey Kardashevskiy , Alexander Graf ","Date":"Mon, 11 Sep 2017 19:12:22 +0200","Message-Id":"<20170911171235.29331-9-clg@kaod.org>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170911171235.29331-1-clg@kaod.org>","References":"<20170911171235.29331-1-clg@kaod.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","X-Ovh-Tracer-Id":"14144117580534418259","X-VR-SPAMSTATE":"OK","X-VR-SPAMSCORE":"-100","X-VR-SPAMCAUSE":"gggruggvucftvghtrhhoucdtuddrfeelledrgedtgdduudehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"188.165.53.149","Subject":"[Qemu-devel] [RFC PATCH v2 08/21] ppc/xive: describe the XIVE\n\tinterrupt source flags","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"The XIVE interrupt sources can have different characteristics\ndepending on their nature and the HW level in use. The PAPR specs\nprovide a set of flags to describe them : :\n\n - XIVE_SRC_H_INT_ESB the Event State Buffers are controlled with a\n specific hcall H_INT_ESB and not with MMIO\n - XIVE_SRC_LSI LSI or MSI source (ICSIRQState level)\n - XIVE_SRC_TRIGGER the full function page supports trigger\n - XIVE_SRC_STORE_EOI EOI can be done with a store.\n\nOur QEMU emulation of XIVE for the sPAPR machine gathers all sources\nunder a same model and provides a common source with the\nXIVE_SRC_TRIGGER type. So, the above list is mostly informative apart\nfrom the XIVE_SRC_LSI flag which will be deduced from the\nXICS_FLAGS_IRQ_LSI flag of the ICSIRQState array when needed.\n\nThe OS retrieves this information on the source with the\nH_INT_GET_SOURCE_INFO hcall.\n\nSigned-off-by: Cédric Le Goater \n---\n hw/intc/spapr_xive.c | 4 ++++\n include/hw/ppc/spapr_xive.h | 7 +++++++\n 2 files changed, 11 insertions(+)","diff":"diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\nindex 8a85d64efc4c..a1ce993d2afa 100644\n--- a/hw/intc/spapr_xive.c\n+++ b/hw/intc/spapr_xive.c\n@@ -371,6 +371,10 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)\n ics_set_irq_type(xive->ics, i, false);\n }\n \n+ /* All sources are emulated under the XIVE object and share the\n+ * same characteristic */\n+ xive->flags = XIVE_SRC_TRIGGER;\n+\n /* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */\n xive->sbe_size = DIV_ROUND_UP(xive->nr_irqs, 4);\n xive->sbe = g_malloc0(xive->sbe_size);\ndiff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h\nindex 0f516534d76a..b46e59319236 100644\n--- a/include/hw/ppc/spapr_xive.h\n+++ b/include/hw/ppc/spapr_xive.h\n@@ -40,6 +40,13 @@ struct sPAPRXive {\n ICSState *ics; /* XICS source inherited from the SPAPR machine */\n qemu_irq *qirqs;\n \n+ /* Interrupt source flags */\n+#define XIVE_SRC_H_INT_ESB (1ull << (63 - 60))\n+#define XIVE_SRC_LSI (1ull << (63 - 61))\n+#define XIVE_SRC_TRIGGER (1ull << (63 - 62))\n+#define XIVE_SRC_STORE_EOI (1ull << (63 - 63))\n+ uint32_t flags;\n+\n /* XIVE internal tables */\n uint8_t *sbe;\n uint32_t sbe_size;\n","prefixes":["RFC","v2","08/21"]}