{"id":812451,"url":"http://patchwork.ozlabs.org/api/patches/812451/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911171235.29331-2-clg@kaod.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170911171235.29331-2-clg@kaod.org>","list_archive_url":null,"date":"2017-09-11T17:12:15","name":"[RFC,v2,01/21] ppc/xive: introduce a skeleton for the sPAPR XIVE interrupt controller","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1310525d4f2ad92f1f25b3f48f2441ca7a713d58","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/?format=json","name":"Cédric Le Goater","email":"clg@kaod.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911171235.29331-2-clg@kaod.org/mbox/","series":[{"id":2526,"url":"http://patchwork.ozlabs.org/api/series/2526/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2526","date":"2017-09-11T17:12:14","name":"Guest exploitation of the XIVE interrupt controller (POWER9)","version":2,"mbox":"http://patchwork.ozlabs.org/series/2526/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812451/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812451/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrZJw57pBz9s83\n\tfor ;\n\tTue, 12 Sep 2017 03:13:52 +1000 (AEST)","from localhost ([::1]:59253 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1drSHO-0000D6-Kq\n\tfor incoming@patchwork.ozlabs.org; Mon, 11 Sep 2017 13:13:50 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:34584)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1drSGc-00006f-1S\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:07 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1drSGX-0003jA-Rr\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:02 -0400","from 2.mo2.mail-out.ovh.net ([188.165.53.149]:59556)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1drSGX-0003ib-IB\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:12:57 -0400","from player770.ha.ovh.net (b6.ovh.net [213.186.33.56])\n\tby mo2.mail-out.ovh.net (Postfix) with ESMTP id EDECEA4C3C\n\tfor ; Mon, 11 Sep 2017 19:12:55 +0200 (CEST)","from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: clg@kaod.org)\n\tby player770.ha.ovh.net (Postfix) with ESMTPSA id BD0BE3C006C;\n\tMon, 11 Sep 2017 19:12:48 +0200 (CEST)"],"From":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","To":"qemu-ppc@nongnu.org, qemu-devel@nongnu.org,\n\tDavid Gibson ,\n\tBenjamin Herrenschmidt ,\n\tAlexey Kardashevskiy , Alexander Graf ","Date":"Mon, 11 Sep 2017 19:12:15 +0200","Message-Id":"<20170911171235.29331-2-clg@kaod.org>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170911171235.29331-1-clg@kaod.org>","References":"<20170911171235.29331-1-clg@kaod.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","X-Ovh-Tracer-Id":"14129762359865412435","X-VR-SPAMSTATE":"OK","X-VR-SPAMSCORE":"-100","X-VR-SPAMCAUSE":"gggruggvucftvghtrhhoucdtuddrfeelledrgedtgdduudehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"188.165.53.149","Subject":"[Qemu-devel] [RFC PATCH v2 01/21] ppc/xive: introduce a skeleton\n\tfor the sPAPR XIVE interrupt controller","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Start with a couple of attributes for the XIVE sPAPR controller\nmodel. The number of provisionned IRQ is necessary to size the\ndifferent internal XIVE tables, the number of CPUs is also.\n\nSigned-off-by: Cédric Le Goater \n---\n default-configs/ppc64-softmmu.mak | 1 +\n hw/intc/Makefile.objs | 1 +\n hw/intc/spapr_xive.c | 76 +++++++++++++++++++++++++++++++++++++++\n include/hw/ppc/spapr_xive.h | 37 +++++++++++++++++++\n 4 files changed, 115 insertions(+)\n create mode 100644 hw/intc/spapr_xive.c\n create mode 100644 include/hw/ppc/spapr_xive.h","diff":"diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak\nindex 46c95993217d..8294df31c0f5 100644\n--- a/default-configs/ppc64-softmmu.mak\n+++ b/default-configs/ppc64-softmmu.mak\n@@ -56,6 +56,7 @@ CONFIG_SM501=y\n CONFIG_XICS=$(CONFIG_PSERIES)\n CONFIG_XICS_SPAPR=$(CONFIG_PSERIES)\n CONFIG_XICS_KVM=$(and $(CONFIG_PSERIES),$(CONFIG_KVM))\n+CONFIG_XIVE_SPAPR=$(CONFIG_PSERIES)\n # For PReP\n CONFIG_SERIAL_ISA=y\n CONFIG_MC146818RTC=y\ndiff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs\nindex 78426a7dafcd..2dae80bdf611 100644\n--- a/hw/intc/Makefile.objs\n+++ b/hw/intc/Makefile.objs\n@@ -35,6 +35,7 @@ obj-$(CONFIG_SH4) += sh_intc.o\n obj-$(CONFIG_XICS) += xics.o\n obj-$(CONFIG_XICS_SPAPR) += xics_spapr.o\n obj-$(CONFIG_XICS_KVM) += xics_kvm.o\n+obj-$(CONFIG_XIVE_SPAPR) += spapr_xive.o\n obj-$(CONFIG_POWERNV) += xics_pnv.o\n obj-$(CONFIG_ALLWINNER_A10_PIC) += allwinner-a10-pic.o\n obj-$(CONFIG_S390_FLIC) += s390_flic.o\ndiff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\nnew file mode 100644\nindex 000000000000..c83796519586\n--- /dev/null\n+++ b/hw/intc/spapr_xive.c\n@@ -0,0 +1,76 @@\n+/*\n+ * QEMU PowerPC sPAPR XIVE model\n+ *\n+ * Copyright (c) 2017, IBM Corporation.\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License, version 2, as\n+ * published by the Free Software Foundation.\n+ *\n+ * This program is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU General Public License for more details.\n+ *\n+ * You should have received a copy of the GNU General Public License\n+ * along with this program; if not, see .\n+ */\n+#include \"qemu/osdep.h\"\n+#include \"qemu/log.h\"\n+#include \"qapi/error.h\"\n+#include \"target/ppc/cpu.h\"\n+#include \"sysemu/cpus.h\"\n+#include \"sysemu/dma.h\"\n+#include \"monitor/monitor.h\"\n+#include \"hw/ppc/xics.h\"\n+#include \"hw/ppc/spapr_xive.h\"\n+\n+\n+/*\n+ * Main XIVE object\n+ */\n+\n+static void spapr_xive_realize(DeviceState *dev, Error **errp)\n+{\n+ sPAPRXive *xive = SPAPR_XIVE(dev);\n+\n+ if (!xive->nr_targets) {\n+ error_setg(errp, \"Number of interrupt targets needs to be greater 0\");\n+ return;\n+ }\n+\n+ /* We need to be able to allocate at least the IPIs */\n+ if (!xive->nr_irqs || xive->nr_irqs < xive->nr_targets) {\n+ error_setg(errp, \"Number of interrupts too small\");\n+ return;\n+ }\n+}\n+\n+static Property spapr_xive_properties[] = {\n+ DEFINE_PROP_UINT32(\"nr-irqs\", sPAPRXive, nr_irqs, 0),\n+ DEFINE_PROP_UINT32(\"nr-targets\", sPAPRXive, nr_targets, 0),\n+ DEFINE_PROP_END_OF_LIST(),\n+};\n+\n+static void spapr_xive_class_init(ObjectClass *klass, void *data)\n+{\n+ DeviceClass *dc = DEVICE_CLASS(klass);\n+\n+ dc->realize = spapr_xive_realize;\n+ dc->props = spapr_xive_properties;\n+ dc->desc = \"sPAPR XIVE interrupt controller\";\n+}\n+\n+static const TypeInfo spapr_xive_info = {\n+ .name = TYPE_SPAPR_XIVE,\n+ .parent = TYPE_SYS_BUS_DEVICE,\n+ .instance_size = sizeof(sPAPRXive),\n+ .class_init = spapr_xive_class_init,\n+};\n+\n+static void spapr_xive_register_types(void)\n+{\n+ type_register_static(&spapr_xive_info);\n+}\n+\n+type_init(spapr_xive_register_types)\ndiff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h\nnew file mode 100644\nindex 000000000000..5b99f7fc2b81\n--- /dev/null\n+++ b/include/hw/ppc/spapr_xive.h\n@@ -0,0 +1,37 @@\n+/*\n+ * QEMU PowerPC sPAPR XIVE model\n+ *\n+ * Copyright (c) 2017, IBM Corporation.\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License, version 2, as\n+ * published by the Free Software Foundation.\n+ *\n+ * This program is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU General Public License for more details.\n+ *\n+ * You should have received a copy of the GNU General Public License\n+ * along with this program; if not, see .\n+ */\n+\n+#ifndef PPC_SPAPR_XIVE_H\n+#define PPC_SPAPR_XIVE_H\n+\n+#include \n+\n+typedef struct sPAPRXive sPAPRXive;\n+\n+#define TYPE_SPAPR_XIVE \"spapr-xive\"\n+#define SPAPR_XIVE(obj) OBJECT_CHECK(sPAPRXive, (obj), TYPE_SPAPR_XIVE)\n+\n+struct sPAPRXive {\n+ SysBusDevice parent;\n+\n+ /* Properties */\n+ uint32_t nr_targets;\n+ uint32_t nr_irqs;\n+};\n+\n+#endif /* PPC_SPAPR_XIVE_H */\n","prefixes":["RFC","v2","01/21"]}