{"id":812405,"url":"http://patchwork.ozlabs.org/api/patches/812405/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20170911151029.25185-2-jeffy.chen@rock-chips.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170911151029.25185-2-jeffy.chen@rock-chips.com>","list_archive_url":null,"date":"2017-09-11T15:10:27","name":"[v5,1/3] PCI: rockchip: Add support for pcie wake irq","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"5625719c695c1d6e4bc5670300ee83dc72adb800","submitter":{"id":67754,"url":"http://patchwork.ozlabs.org/api/people/67754/?format=json","name":"Jeffy Chen","email":"jeffy.chen@rock-chips.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20170911151029.25185-2-jeffy.chen@rock-chips.com/mbox/","series":[{"id":2512,"url":"http://patchwork.ozlabs.org/api/series/2512/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=2512","date":"2017-09-11T15:10:26","name":"PCI: rockchip: Move PCIE_WAKE handling into rockchip pcie driver","version":5,"mbox":"http://patchwork.ozlabs.org/series/2512/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812405/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812405/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrWbx63qwz9s7C\n\tfor ;\n\tTue, 12 Sep 2017 01:11:41 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751709AbdIKPKw (ORCPT );\n\tMon, 11 Sep 2017 11:10:52 -0400","from regular1.263xmail.com ([211.150.99.140]:38902 \"EHLO\n\tregular1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751548AbdIKPKv (ORCPT\n\t); Mon, 11 Sep 2017 11:10:51 -0400","from jeffy.chen?rock-chips.com (unknown [192.168.167.223])\n\tby regular1.263xmail.com (Postfix) with ESMTP id 098D44A3F;\n\tMon, 11 Sep 2017 23:10:45 +0800 (CST)","from localhost (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 4853C378;\n\tMon, 11 Sep 2017 23:10:44 +0800 (CST)","from localhost (unknown [103.29.142.67])\n\tby smtp.263.net (Postfix) whith ESMTP id 22382EHK69J;\n\tMon, 11 Sep 2017 23:10:47 +0800 (CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"0","X-MAIL-DELIVERY":"1","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"jeffy.chen@rock-chips.com","X-FST-TO":"linux-kernel@vger.kernel.org","X-SENDER-IP":"103.29.142.67","X-LOGIN-NAME":"jeffy.chen@rock-chips.com","X-UNIQUE-TAG":"","X-ATTACHMENT-NUM":"0","X-SENDER":"cjf@rock-chips.com","X-DNS-TYPE":"0","From":"Jeffy Chen ","To":"linux-kernel@vger.kernel.org, bhelgaas@google.com","Cc":"shawn.lin@rock-chips.com, briannorris@chromium.org,\n\tdianders@chromium.org, Jeffy Chen ,\n\tHeiko Stuebner , linux-pci@vger.kernel.org,\n\tlinux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org","Subject":"[PATCH v5 1/3] PCI: rockchip: Add support for pcie wake irq","Date":"Mon, 11 Sep 2017 23:10:27 +0800","Message-Id":"<20170911151029.25185-2-jeffy.chen@rock-chips.com>","X-Mailer":"git-send-email 2.11.0","In-Reply-To":"<20170911151029.25185-1-jeffy.chen@rock-chips.com>","References":"<20170911151029.25185-1-jeffy.chen@rock-chips.com>","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"},"content":"Add support for PCIE_WAKE pin in rockchip pcie driver.\n\nSigned-off-by: Jeffy Chen \n---\n\nChanges in v5:\nRebase\n\nChanges in v3:\nFix error handling\n\nChanges in v2:\nUse dev_pm_set_dedicated_wake_irq\n -- Suggested by Brian Norris \n\n drivers/pci/host/pcie-rockchip.c | 19 +++++++++++++++++--\n 1 file changed, 17 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\nindex 9051c6c8fea4..a8b7272597a7 100644\n--- a/drivers/pci/host/pcie-rockchip.c\n+++ b/drivers/pci/host/pcie-rockchip.c\n@@ -37,6 +37,7 @@\n #include \n #include \n #include \n+#include \n #include \n #include \n \n@@ -995,6 +996,15 @@ static int rockchip_pcie_setup_irq(struct rockchip_pcie *rockchip)\n \t\treturn err;\n \t}\n \n+\t/* Must init wakeup before setting dedicated wakeup irq. */\n+\tdevice_init_wakeup(dev, true);\n+\tirq = platform_get_irq_byname(pdev, \"wakeup\");\n+\tif (irq >= 0) {\n+\t\terr = dev_pm_set_dedicated_wake_irq(dev, irq);\n+\t\tif (err)\n+\t\t\tdev_err(dev, \"failed to setup PCIe wakeup IRQ\\n\");\n+\t}\n+\n \treturn 0;\n }\n \n@@ -1542,11 +1552,11 @@ static int rockchip_pcie_probe(struct platform_device *pdev)\n \n \terr = rockchip_pcie_parse_dt(rockchip);\n \tif (err)\n-\t\treturn err;\n+\t\tgoto err_disable_wake;\n \n \terr = rockchip_pcie_enable_clocks(rockchip);\n \tif (err)\n-\t\treturn err;\n+\t\tgoto err_disable_wake;\n \n \terr = rockchip_pcie_set_vpcie(rockchip);\n \tif (err) {\n@@ -1656,6 +1666,9 @@ static int rockchip_pcie_probe(struct platform_device *pdev)\n \t\tregulator_disable(rockchip->vpcie0v9);\n err_set_vpcie:\n \trockchip_pcie_disable_clocks(rockchip);\n+err_disable_wake:\n+\tdev_pm_clear_wake_irq(dev);\n+\tdevice_init_wakeup(dev, false);\n \treturn err;\n }\n \n@@ -1682,6 +1695,8 @@ static int rockchip_pcie_remove(struct platform_device *pdev)\n \tif (!IS_ERR(rockchip->vpcie0v9))\n \t\tregulator_disable(rockchip->vpcie0v9);\n \n+\tdev_pm_clear_wake_irq(dev);\n+\tdevice_init_wakeup(dev, false);\n \treturn 0;\n }\n \n","prefixes":["v5","1/3"]}