{"id":811430,"url":"http://patchwork.ozlabs.org/api/patches/811430/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20170908095348.16578-3-thomas.petazzoni@free-electrons.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170908095348.16578-3-thomas.petazzoni@free-electrons.com>","list_archive_url":null,"date":"2017-09-08T09:53:43","name":"[2/7] PCI: aardvark: set PIO_ADDR_LS correctly in advk_pcie_rd_conf()","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"7f8ade2beb4370a4cdb6dcf0877ec457e3ebd763","submitter":{"id":2230,"url":"http://patchwork.ozlabs.org/api/people/2230/?format=json","name":"Thomas Petazzoni","email":"thomas.petazzoni@free-electrons.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20170908095348.16578-3-thomas.petazzoni@free-electrons.com/mbox/","series":[{"id":2162,"url":"http://patchwork.ozlabs.org/api/series/2162/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=2162","date":"2017-09-08T09:53:41","name":"PCI: aardvark: improve compatibility with PCI devices","version":1,"mbox":"http://patchwork.ozlabs.org/series/2162/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/811430/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/811430/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpXhr0h8jz9sDB\n\tfor ;\n\tFri, 8 Sep 2017 19:54:04 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751894AbdIHJyB (ORCPT );\n\tFri, 8 Sep 2017 05:54:01 -0400","from mail.free-electrons.com ([62.4.15.54]:41951 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753292AbdIHJyA (ORCPT\n\t); Fri, 8 Sep 2017 05:54:00 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid A745921D2F; Fri, 8 Sep 2017 11:53:57 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 79F7620A4E;\n\tFri, 8 Sep 2017 11:53:57 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Thomas Petazzoni ","To":"Bjorn Helgaas , linux-pci@vger.kernel.org","Cc":"Nadav Haklai , Hanna Hawa ,\n\tYehuda Yitschak , Victor Gu ,\n\tJason Cooper , Andrew Lunn ,\n\tSebastian Hesselbarth , Gregory Clement\n\t, \n\tlinux-arm-kernel@lists.infradead.org, =?utf-8?q?Miqu=C3=A8l_Raynal?=\n\t, Antoine Tenart\n\t, stable@vger.kernel.org,\n\tThomas Petazzoni ","Subject":"[PATCH 2/7] PCI: aardvark: set PIO_ADDR_LS correctly in\n\tadvk_pcie_rd_conf()","Date":"Fri, 8 Sep 2017 11:53:43 +0200","Message-Id":"<20170908095348.16578-3-thomas.petazzoni@free-electrons.com>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170908095348.16578-1-thomas.petazzoni@free-electrons.com>","References":"<20170908095348.16578-1-thomas.petazzoni@free-electrons.com>","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"},"content":"From: Victor Gu \n\nWhen setting the PIO_ADDR_LS register during a configuration read, we\nwere properly passing the device number, function number and register\nnumber, but not the bus number, causing issues when reading the\nconfiguration of PCIe devices.\n\nFixes: 8c39d710363c1 (\"PCI: aardvark: Add Aardvark PCI host controller driver\")\nCc: \nSigned-off-by: Victor Gu \nReviewed-by: Wilson Ding \nReviewed-by: Nadav Haklai \n[Thomas: tweak commit log.]\nSigned-off-by: Thomas Petazzoni \n---\n drivers/pci/host/pci-aardvark.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c\nindex 582d75f864e3..68ff10e17c74 100644\n--- a/drivers/pci/host/pci-aardvark.c\n+++ b/drivers/pci/host/pci-aardvark.c\n@@ -460,7 +460,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,\n \tadvk_writel(pcie, reg, PIO_CTRL);\n \n \t/* Program the address registers */\n-\treg = PCIE_BDF(devfn) | PCIE_CONF_REG(where);\n+\treg = PCIE_CONF_ADDR(bus->number, devfn, where);\n \tadvk_writel(pcie, reg, PIO_ADDR_LS);\n \tadvk_writel(pcie, 0, PIO_ADDR_MS);\n \n","prefixes":["2/7"]}