{"id":811066,"url":"http://patchwork.ozlabs.org/api/patches/811066/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170907145148.24398-8-npiggin@gmail.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<20170907145148.24398-8-npiggin@gmail.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/20170907145148.24398-8-npiggin@gmail.com/","date":"2017-09-07T14:51:47","name":"[RFC,7/8] powerpc/64s/radix: Improve TLB flushing for unmaps that free a page table","commit_ref":null,"pull_url":null,"state":"superseded","archived":true,"hash":"3c34a51f1fee09b2c3368e6d71010e59926f0132","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/people/69518/?format=json","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170907145148.24398-8-npiggin@gmail.com/mbox/","series":[{"id":2010,"url":"http://patchwork.ozlabs.org/api/series/2010/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2010","date":"2017-09-07T14:51:40","name":"Further radix TLB flush optimisations","version":1,"mbox":"http://patchwork.ozlabs.org/series/2010/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/811066/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/811066/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xp3hb1y4Nz9ryr\n\tfor ;\n\tFri, 8 Sep 2017 01:07:11 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xp3hb0mSczDrW9\n\tfor ;\n\tFri, 8 Sep 2017 01:07:11 +1000 (AEST)","from mail-pf0-x241.google.com (mail-pf0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c00::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xp3Mr1X0bzDrWY\n\tfor ;\n\tFri, 8 Sep 2017 00:52:40 +1000 (AEST)","by mail-pf0-x241.google.com with SMTP id a2so4610220pfj.4\n\tfor ;\n\tThu, 07 Sep 2017 07:52:39 -0700 (PDT)","from roar.au.ibm.com (203-219-56-202.tpgi.com.au. [203.219.56.202])\n\tby smtp.gmail.com with ESMTPSA id\n\ta6sm4642791pfa.76.2017.09.07.07.52.34\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 07 Sep 2017 07:52:37 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"C7OShDLY\"; dkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"C7OShDLY\"; dkim-atps=neutral","ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c00::241; helo=mail-pf0-x241.google.com;\n\tenvelope-from=npiggin@gmail.com; receiver=)","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"C7OShDLY\"; dkim-atps=neutral"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=k7jtoLrGnc5cupJ5VkPsvyaqyNbZ8IwAu+HiJhw7pnE=;\n\tb=C7OShDLYqGCgdah8QOHU/++KAFNwqX4We2CiILc5HOkvVSMkl+ffI6Z8WY2J8pI/uH\n\tNIc4BzkejnjOX157irnsXL4KUH2L6dmuflO8tfPT+Jvq983wwc4JtBGcAcIwgoaQEC8B\n\tpnd51gp7DL6P3hkuNZiwOps9ZTNXObuGA8gRARFhzqgIsCWmHCdjDm0TYnDlXN3NTToX\n\ttN/+5ZGzSrdgRLViQeCnRjnfbY03J9ii1Sfxpz4aG5XOJavA+zzlw3078j7MI/uynqSb\n\td6P5UXq5PqxgTkeSbzBOhl7gnA8coxlr4Z+tCt41uf8vtVBm62DrGXp5hTWGfJqz416X\n\t56+w==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=k7jtoLrGnc5cupJ5VkPsvyaqyNbZ8IwAu+HiJhw7pnE=;\n\tb=q3U0+loSOuwjCgm08Fl6KZekgai+l3CXVG8MZIW/VYOVjVUep4LxlNO65ovadHDLlM\n\t4WnXBf6qgYMVJZJoDGpQa8InkPeDQv6T9AlrrcbJLIV5/g3Ju1sfeUUFVHv8ROD0L0HN\n\tkKqdBPjIADe6y7aQbdlh/xzLlU1bmDUcztIyXbV+2z39LLVOS7nbf5cLcon1BQocpkJO\n\tNxNFgJRhEE8MlWIJq8D5mfjQXvjMfQb3R0ZHG3zrDd4cMmZfnYTt9nlKrgV6usXVBJcp\n\tr7B1a5A8a5kcJxrxaqdwoX/FY4pE/YX/Gk5qf9POJSlk3uTXbXwfsTDNm5hpJiIHhhsT\n\t0O4g==","X-Gm-Message-State":"AHPjjUh/RkSAl9aBOf9zyVda9m6QdCRu90DRnLXW2tzFpV/iLU2KahRD\n\tzUC+S4nFQyCFwoTJ","X-Google-Smtp-Source":"ADKCNb5zcDX8yyNnH4RGvDtDuaPyLHSU6eLBDfo0R3QgEo4P7jqpoIY99zWouAhqw/DRYKRp6kSOfQ==","X-Received":"by 10.99.126.84 with SMTP id o20mr2989166pgn.133.1504795958009; \n\tThu, 07 Sep 2017 07:52:38 -0700 (PDT)","From":"Nicholas Piggin ","To":"linuxppc-dev@lists.ozlabs.org","Subject":"[RFC PATCH 7/8] powerpc/64s/radix: Improve TLB flushing for unmaps\n\tthat free a page table","Date":"Fri, 8 Sep 2017 00:51:47 +1000","Message-Id":"<20170907145148.24398-8-npiggin@gmail.com>","X-Mailer":"git-send-email 2.13.3","In-Reply-To":"<20170907145148.24398-1-npiggin@gmail.com>","References":"<20170907145148.24398-1-npiggin@gmail.com>","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"\"Aneesh Kumar K . V\" ,\n\tNicholas Piggin , Anton Blanchard ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"Unmaps that free page tables always flush the PID, which is sub\noptimal. Allow those to do TLB range flushes with separate PWC flush.\n\nSigned-off-by: Nicholas Piggin \n---\n arch/powerpc/mm/tlb-radix.c | 51 +++++++++++++++++++++++++++++++++++----------\n 1 file changed, 40 insertions(+), 11 deletions(-)","diff":"diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c\nindex 1b0cac656680..7452e1f4aa3c 100644\n--- a/arch/powerpc/mm/tlb-radix.c\n+++ b/arch/powerpc/mm/tlb-radix.c\n@@ -351,23 +351,35 @@ static int radix_get_mmu_psize(int page_size)\n \treturn psize;\n }\n \n+static void radix__flush_tlb_pwc_range_psize(struct mm_struct *mm, unsigned long start,\n+\t\t\t\t unsigned long end, int psize);\n+\n void radix__tlb_flush(struct mmu_gather *tlb)\n {\n \tint psize = 0;\n \tstruct mm_struct *mm = tlb->mm;\n \tint page_size = tlb->page_size;\n \n-\tpsize = radix_get_mmu_psize(page_size);\n \t/*\n \t * if page size is not something we understand, do a full mm flush\n \t */\n-\tif (psize != -1 && !tlb->fullmm && !tlb->need_flush_all)\n-\t\tradix__flush_tlb_range_psize(mm, tlb->start, tlb->end, psize);\n-\telse if (tlb->need_flush_all) {\n-\t\ttlb->need_flush_all = 0;\n+\tif (tlb->fullmm) {\n \t\tradix__flush_all_mm(mm);\n-\t} else\n-\t\tradix__flush_tlb_mm(mm);\n+\t} else if ( (psize = radix_get_mmu_psize(page_size)) == -1) {\n+\t\tif (!tlb->need_flush_all)\n+\t\t\tradix__flush_tlb_mm(mm);\n+\t\telse\n+\t\t\tradix__flush_all_mm(mm);\n+\t} else {\n+\t\tunsigned long start = tlb->start;\n+\t\tunsigned long end = tlb->end;\n+\n+\t\tif (!tlb->need_flush_all)\n+\t\t\tradix__flush_tlb_range_psize(mm, start, end, psize);\n+\t\telse\n+\t\t\tradix__flush_tlb_pwc_range_psize(mm, start, end, psize);\n+\t}\n+\ttlb->need_flush_all = 0;\n }\n \n #define TLB_FLUSH_ALL -1UL\n@@ -384,8 +396,9 @@ void radix__tlb_flush(struct mmu_gather *tlb)\n static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;\n static unsigned long tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2;\n \n-bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n-\t\t\t\t unsigned long end, int psize)\n+static bool __radix__flush_tlb_range_psize(struct mm_struct *mm,\n+\t\t\t\tunsigned long start, unsigned long end,\n+\t\t\t\tint psize, bool also_pwc)\n {\n \tunsigned long pid;\n \tunsigned int page_shift = mmu_psize_defs[psize].shift;\n@@ -401,17 +414,21 @@ bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n \t\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n \t\t\t\t\ttlb_local_single_page_flush_ceiling) {\n \t\t\tfull = true;\n-\t\t\t_tlbiel_pid(pid, RIC_FLUSH_TLB);\n+\t\t\t_tlbiel_pid(pid, also_pwc ? RIC_FLUSH_ALL : RIC_FLUSH_TLB);\n \t\t} else {\n \t\t\t_tlbiel_va_range(start, end, pid, page_size, psize);\n+\t\t\tif (also_pwc)\n+\t\t\t\t_tlbiel_pid(pid, RIC_FLUSH_PWC);\n \t\t}\n \t} else {\n \t\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n \t\t\t\t\ttlb_single_page_flush_ceiling) {\n \t\t\tfull = true;\n-\t\t\t_tlbie_pid(pid, RIC_FLUSH_TLB);\n+\t\t\t_tlbie_pid(pid, also_pwc ? RIC_FLUSH_ALL : RIC_FLUSH_TLB);\n \t\t} else {\n \t\t\t_tlbie_va_range(start, end, pid, page_size, psize);\n+\t\t\tif (also_pwc)\n+\t\t\t\t_tlbie_pid(pid, RIC_FLUSH_PWC);\n \t\t}\n \t}\n \tpreempt_enable();\n@@ -419,6 +436,18 @@ bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n \treturn full;\n }\n \n+bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n+\t\t\t\t unsigned long end, int psize)\n+{\n+\treturn __radix__flush_tlb_range_psize(mm, start, end, psize, false);\n+}\n+\n+static void radix__flush_tlb_pwc_range_psize(struct mm_struct *mm, unsigned long start,\n+\t\t\t\t unsigned long end, int psize)\n+{\n+\t__radix__flush_tlb_range_psize(mm, start, end, psize, true);\n+}\n+\n #ifdef CONFIG_TRANSPARENT_HUGEPAGE\n void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr)\n {\n","prefixes":["RFC","7/8"]}