{"id":810990,"url":"http://patchwork.ozlabs.org/api/patches/810990/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1504785168-26572-4-git-send-email-pierre-yves.mordret@st.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504785168-26572-4-git-send-email-pierre-yves.mordret@st.com>","list_archive_url":null,"date":"2017-09-07T11:52:47","name":"[v4,3/4] dt-bindings: stm32-dma: add a property to handle STM32 DMAMUX","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"02d355df528dd475d6169387ec953f30ede60ded","submitter":{"id":71499,"url":"http://patchwork.ozlabs.org/api/people/71499/?format=json","name":"Pierre Yves MORDRET","email":"pierre-yves.mordret@st.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1504785168-26572-4-git-send-email-pierre-yves.mordret@st.com/mbox/","series":[{"id":1988,"url":"http://patchwork.ozlabs.org/api/series/1988/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=1988","date":"2017-09-07T11:52:47","name":"Add STM32 DMAMUX support","version":4,"mbox":"http://patchwork.ozlabs.org/series/1988/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810990/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810990/checks/","tags":{},"related":[],"headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnzPh3djtz9t2W\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tThu,  7 Sep 2017 21:54:00 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754953AbdIGLx6 (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tThu, 7 Sep 2017 07:53:58 -0400","from mx07-00178001.pphosted.com ([62.209.51.94]:62923 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1754249AbdIGLx5 (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Thu, 7 Sep 2017 07:53:57 -0400","from pps.filterd (m0046668.ppops.net [127.0.0.1])\n\tby mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv87BnBO7026629; Thu, 7 Sep 2017 13:53:02 +0200","from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx07-00178001.pphosted.com with ESMTP id 2cu5hug0yg-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tThu, 07 Sep 2017 13:53:02 +0200","from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A12F938;\n\tThu,  7 Sep 2017 11:53:01 +0000 (GMT)","from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8049F25AA;\n\tThu,  7 Sep 2017 11:53:01 +0000 (GMT)","from localhost (10.75.127.47) by SFHDAG5NODE2.st.com (10.75.127.14)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tThu, 7 Sep 2017 13:53:00 +0200"],"From":"Pierre-Yves MORDRET <pierre-yves.mordret@st.com>","To":"Vinod Koul <vinod.koul@intel.com>, Rob Herring <robh+dt@kernel.org>,\n\tMark Rutland <mark.rutland@arm.com>,\n\tMaxime Coquelin <mcoquelin.stm32@gmail.com>,\n\tAlexandre Torgue <alexandre.torgue@st.com>,\n\tRussell King <linux@armlinux.org.uk>,\n\tDan Williams <dan.j.williams@intel.com>,\n\t\"M'boumba Cedric Madianga\" <cedric.madianga@gmail.com>,\n\tFabrice GASNIER <fabrice.gasnier@st.com>,\n\tHerbert Xu <herbert@gondor.apana.org.au>,\n\tFabien DESSENNE <fabien.dessenne@st.com>,\n\tAmelie Delaunay <amelie.delaunay@st.com>,\n\tPierre-Yves MORDRET <pierre-yves.mordret@st.com>,\n\t<dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>","Subject":"[PATCH v4 3/4] dt-bindings: stm32-dma: add a property to handle\n\tSTM32 DMAMUX","Date":"Thu, 7 Sep 2017 13:52:47 +0200","Message-ID":"<1504785168-26572-4-git-send-email-pierre-yves.mordret@st.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1504785168-26572-1-git-send-email-pierre-yves.mordret@st.com>","References":"<1504785168-26572-1-git-send-email-pierre-yves.mordret@st.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.75.127.47]","X-ClientProxiedBy":"SFHDAG3NODE3.st.com (10.75.127.9) To SFHDAG5NODE2.st.com\n\t(10.75.127.14)","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-07_08:, , signatures=0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"STM32 DMA controller has to exposed its number of request line to be\naddressed via STM32 DMAMUX.\n\nSigned-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>\nSigned-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>\n---\n Version history:\n    v4:\n        * get rid of st,dmamux property\n        * number of DMA requests is exposed for DMAMUX\n    v3:\n        * None\n    v2:\n        * Typo fix\n---\n---\n Documentation/devicetree/bindings/dma/stm32-dma.txt | 4 +++-\n 1 file changed, 3 insertions(+), 1 deletion(-)","diff":"diff --git a/Documentation/devicetree/bindings/dma/stm32-dma.txt b/Documentation/devicetree/bindings/dma/stm32-dma.txt\nindex 4408af6..77542e1 100644\n--- a/Documentation/devicetree/bindings/dma/stm32-dma.txt\n+++ b/Documentation/devicetree/bindings/dma/stm32-dma.txt\n@@ -13,6 +13,7 @@ Required properties:\n - #dma-cells : Must be <4>. See DMA client paragraph for more details.\n \n Optional properties:\n+- dma-requests : Number of DMA requests supported.\n - resets: Reference to a reset controller asserting the DMA controller\n - st,mem2mem: boolean; if defined, it indicates that the controller supports\n   memory-to-memory transfer\n@@ -34,12 +35,13 @@ Example:\n \t\t#dma-cells = <4>;\n \t\tst,mem2mem;\n \t\tresets = <&rcc 150>;\n+\t\tdma-requests = <8>;\n \t};\n \n * DMA client\n \n DMA clients connected to the STM32 DMA controller must use the format\n-described in the dma.txt file, using a five-cell specifier for each\n+described in the dma.txt file, using a four-cell specifier for each\n channel: a phandle to the DMA controller plus the following four integer cells:\n \n 1. The channel id\n","prefixes":["v4","3/4"]}