{"id":810861,"url":"http://patchwork.ozlabs.org/api/patches/810861/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1504766144.12628.15.camel@kernel.crashing.org/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<1504766144.12628.15.camel@kernel.crashing.org>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/1504766144.12628.15.camel@kernel.crashing.org/","date":"2017-09-07T06:35:44","name":"[2/2] powerpc/powernv: Rework EEH initialization on powernv","commit_ref":"b9fde58db7e5738cacb740b0ec547933fe314fbe","pull_url":null,"state":"accepted","archived":false,"hash":"519253791dd144ab7a3d77a07bf6d1b67b2ea4f9","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/?format=json","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1504766144.12628.15.camel@kernel.crashing.org/mbox/","series":[{"id":1915,"url":"http://patchwork.ozlabs.org/api/series/1915/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=1915","date":"2017-09-07T06:35:40","name":"[1/2] powerpc/eeh: Create PHB PEs after EEH is initialized","version":1,"mbox":"http://patchwork.ozlabs.org/series/1915/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810861/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810861/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org","linuxppc-dev@ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnrPT4lPKz9sRY\n\tfor ;\n\tThu, 7 Sep 2017 16:38:21 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xnrPT3sgwzDrZp\n\tfor ;\n\tThu, 7 Sep 2017 16:38:21 +1000 (AEST)","from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xnrMp2PfNzDrY5\n\tfor ;\n\tThu, 7 Sep 2017 16:36:54 +1000 (AEST)","from ozlabs.org (bilbo.ozlabs.org [103.22.144.67])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 3xnrMp1dhNz8tD9\n\tfor ;\n\tThu, 7 Sep 2017 16:36:54 +1000 (AEST)","by ozlabs.org (Postfix)\n\tid 3xnrMp1Cdvz9s8J; Thu, 7 Sep 2017 16:36:54 +1000 (AEST)","from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnrMn1jdtz9s82\n\tfor ; Thu, 7 Sep 2017 16:36:52 +1000 (AEST)","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v876Zi9d004862;\n\tThu, 7 Sep 2017 01:35:46 -0500"],"Authentication-Results":"ozlabs.org; spf=permerror (mailfrom)\n\tsmtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57;\n\thelo=gate.crashing.org; envelope-from=benh@kernel.crashing.org;\n\treceiver=)","Message-ID":"<1504766144.12628.15.camel@kernel.crashing.org>","Subject":"[PATCH 2/2] powerpc/powernv: Rework EEH initialization on powernv","From":"Benjamin Herrenschmidt ","To":"linuxppc-dev@ozlabs.org","Date":"Thu, 07 Sep 2017 16:35:44 +1000","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Russell Currey ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"Remove the post_init callback which is only used\nby powernv, we can just call it explicitly from\nthe powernv code.\n\nThis partially kills the ability to \"disable\" eeh at\nruntime via debugfs as this was calling that same\ncallback again, but this is both unused and broken\nin several ways. If we want to revive it, we need\nto create a dedicated enable/disable callback on the\nbackend that does the right thing.\n\nLet the bulk of eeh initialize normally at\ncore_initcall() like it does on pseries by removing\nthe hack in eeh_init() that delays it.\n\nInstead we make sure our eeh->probe cleanly bails\nout of the PEs haven't been created yet and we force\na re-probe where we used to call eeh_init() again.\n\nSigned-off-by: Benjamin Herrenschmidt \n---\n arch/powerpc/include/asm/eeh.h | 8 ++---\n arch/powerpc/kernel/eeh.c | 46 +++++++++------------------\n arch/powerpc/platforms/powernv/eeh-powernv.c | 47 +++++++++++++++-------------\n arch/powerpc/platforms/powernv/pci-ioda.c | 3 +-\n arch/powerpc/platforms/powernv/pci.h | 1 +\n 5 files changed, 43 insertions(+), 62 deletions(-)","diff":"diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h\nindex 8e37b71674f4..f44271b3beaf 100644\n--- a/arch/powerpc/include/asm/eeh.h\n+++ b/arch/powerpc/include/asm/eeh.h\n@@ -202,7 +202,6 @@ enum {\n struct eeh_ops {\n \tchar *name;\n \tint (*init)(void);\n-\tint (*post_init)(void);\n \tvoid* (*probe)(struct pci_dn *pdn, void *data);\n \tint (*set_option)(struct eeh_pe *pe, int option);\n \tint (*get_pe_addr)(struct eeh_pe *pe);\n@@ -276,7 +275,7 @@ struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe);\n \n struct eeh_dev *eeh_dev_init(struct pci_dn *pdn);\n void eeh_dev_phb_init_dynamic(struct pci_controller *phb);\n-int eeh_init(void);\n+void eeh_probe_devices(void);\n int __init eeh_ops_register(struct eeh_ops *ops);\n int __exit eeh_ops_unregister(const char *name);\n int eeh_check_failure(const volatile void __iomem *token);\n@@ -322,10 +321,7 @@ static inline bool eeh_enabled(void)\n return false;\n }\n \n-static inline int eeh_init(void)\n-{\n-\treturn 0;\n-}\n+static inline void eeh_probe_devices(void) { }\n \n static inline void *eeh_dev_init(struct pci_dn *pdn, void *data)\n {\ndiff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c\nindex f27eecd5ec7f..5e8617a53a86 100644\n--- a/arch/powerpc/kernel/eeh.c\n+++ b/arch/powerpc/kernel/eeh.c\n@@ -971,6 +971,18 @@ static struct notifier_block eeh_reboot_nb = {\n \t.notifier_call = eeh_reboot_notifier,\n };\n \n+void eeh_probe_devices(void)\n+{\n+\tstruct pci_controller *hose, *tmp;\n+\tstruct pci_dn *pdn;\n+\n+\t/* Enable EEH for all adapters */\n+\tlist_for_each_entry_safe(hose, tmp, &hose_list, list_node) {\n+\t\tpdn = hose->pci_data;\n+\t\ttraverse_pci_dn(pdn, eeh_ops->probe, NULL);\n+\t}\n+}\n+\n /**\n * eeh_init - EEH initialization\n *\n@@ -986,22 +998,11 @@ static struct notifier_block eeh_reboot_nb = {\n * Even if force-off is set, the EEH hardware is still enabled, so that\n * newer systems can boot.\n */\n-int eeh_init(void)\n+static int eeh_init(void)\n {\n \tstruct pci_controller *hose, *tmp;\n-\tstruct pci_dn *pdn;\n-\tstatic int cnt = 0;\n \tint ret = 0;\n \n-\t/*\n-\t * We have to delay the initialization on PowerNV after\n-\t * the PCI hierarchy tree has been built because the PEs\n-\t * are figured out based on PCI devices instead of device\n-\t * tree nodes\n-\t */\n-\tif (machine_is(powernv) && cnt++ <= 0)\n-\t\treturn ret;\n-\n \t/* Register reboot notifier */\n \tret = register_reboot_notifier(&eeh_reboot_nb);\n \tif (ret) {\n@@ -1027,22 +1028,7 @@ int eeh_init(void)\n \tif (ret)\n \t\treturn ret;\n \n-\t/* Enable EEH for all adapters */\n-\tlist_for_each_entry_safe(hose, tmp, &hose_list, list_node) {\n-\t\tpdn = hose->pci_data;\n-\t\ttraverse_pci_dn(pdn, eeh_ops->probe, NULL);\n-\t}\n-\n-\t/*\n-\t * Call platform post-initialization. Actually, It's good chance\n-\t * to inform platform that EEH is ready to supply service if the\n-\t * I/O cache stuff has been built up.\n-\t */\n-\tif (eeh_ops->post_init) {\n-\t\tret = eeh_ops->post_init();\n-\t\tif (ret)\n-\t\t\treturn ret;\n-\t}\n+\teeh_probe_devices();\n \n \tif (eeh_enabled())\n \t\tpr_info(\"EEH: PCI Enhanced I/O Error Handling Enabled\\n\");\n@@ -1757,10 +1743,6 @@ static int eeh_enable_dbgfs_set(void *data, u64 val)\n \telse\n \t\teeh_add_flag(EEH_FORCE_DISABLED);\n \n-\t/* Notify the backend */\n-\tif (eeh_ops->post_init)\n-\t\teeh_ops->post_init();\n-\n \treturn 0;\n }\n \ndiff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c\nindex 3f48f6df1cf3..6bde8f0f78e3 100644\n--- a/arch/powerpc/platforms/powernv/eeh-powernv.c\n+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c\n@@ -41,7 +41,6 @@\n #include \"powernv.h\"\n #include \"pci.h\"\n \n-static bool pnv_eeh_nb_init = false;\n static int eeh_event_irq = -EINVAL;\n \n static int pnv_eeh_init(void)\n@@ -204,31 +203,31 @@ PNV_EEH_DBGFS_ENTRY(inbB, 0xE10);\n * been built. If the I/O cache staff has been built, EEH is\n * ready to supply service.\n */\n-static int pnv_eeh_post_init(void)\n+int pnv_eeh_post_init(void)\n {\n \tstruct pci_controller *hose;\n \tstruct pnv_phb *phb;\n \tint ret = 0;\n \n-\t/* Register OPAL event notifier */\n-\tif (!pnv_eeh_nb_init) {\n-\t\teeh_event_irq = opal_event_request(ilog2(OPAL_EVENT_PCI_ERROR));\n-\t\tif (eeh_event_irq < 0) {\n-\t\t\tpr_err(\"%s: Can't register OPAL event interrupt (%d)\\n\",\n-\t\t\t __func__, eeh_event_irq);\n-\t\t\treturn eeh_event_irq;\n-\t\t}\n+\t/* Probe devices & build address cache */\n+\teeh_probe_devices();\n+\teeh_addr_cache_build();\n \n-\t\tret = request_irq(eeh_event_irq, pnv_eeh_event,\n-\t\t\t\tIRQ_TYPE_LEVEL_HIGH, \"opal-eeh\", NULL);\n-\t\tif (ret < 0) {\n-\t\t\tirq_dispose_mapping(eeh_event_irq);\n-\t\t\tpr_err(\"%s: Can't request OPAL event interrupt (%d)\\n\",\n-\t\t\t __func__, eeh_event_irq);\n-\t\t\treturn ret;\n-\t\t}\n+\t/* Register OPAL event notifier */\n+\teeh_event_irq = opal_event_request(ilog2(OPAL_EVENT_PCI_ERROR));\n+\tif (eeh_event_irq < 0) {\n+\t\tpr_err(\"%s: Can't register OPAL event interrupt (%d)\\n\",\n+\t\t __func__, eeh_event_irq);\n+\t\treturn eeh_event_irq;\n+\t}\n \n-\t\tpnv_eeh_nb_init = true;\n+\tret = request_irq(eeh_event_irq, pnv_eeh_event,\n+\t\t\t IRQ_TYPE_LEVEL_HIGH, \"opal-eeh\", NULL);\n+\tif (ret < 0) {\n+\t\tirq_dispose_mapping(eeh_event_irq);\n+\t\tpr_err(\"%s: Can't request OPAL event interrupt (%d)\\n\",\n+\t\t __func__, eeh_event_irq);\n+\t\treturn ret;\n \t}\n \n \tif (!eeh_enabled())\n@@ -357,7 +356,7 @@ static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)\n \tstruct pci_controller *hose = pdn->phb;\n \tstruct pnv_phb *phb = hose->private_data;\n \tstruct eeh_dev *edev = pdn_to_eeh_dev(pdn);\n-\tuint32_t pcie_flags;\n+\tuint32_t pcie_flags, config_addr;\n \tint ret;\n \n \t/*\n@@ -373,6 +372,11 @@ static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)\n \tif ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)\n \t\treturn NULL;\n \n+\t/* Skip if we haven't probed yet */\n+\tconfig_addr = (pdn->busno << 8) | (pdn->devfn);\n+\tif (phb->ioda.pe_rmap[config_addr] == IODA_INVALID_PE)\n+\t\treturn NULL;\n+\n \t/* Initialize eeh device */\n \tedev->class_code = pdn->class_code;\n \tedev->mode\t&= 0xFFFFFF00;\n@@ -393,7 +397,7 @@ static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)\n \t\t}\n \t}\n \n-\tedev->config_addr = (pdn->busno << 8) | (pdn->devfn);\n+\tedev->config_addr = config_addr;\n \tedev->pe_config_addr = phb->ioda.pe_rmap[edev->config_addr];\n \n \t/* Create PE */\n@@ -1742,7 +1746,6 @@ static int pnv_eeh_restore_config(struct pci_dn *pdn)\n static struct eeh_ops pnv_eeh_ops = {\n \t.name = \"powernv\",\n \t.init = pnv_eeh_init,\n-\t.post_init = pnv_eeh_post_init,\n \t.probe\t\t\t= pnv_eeh_probe,\n \t.set_option = pnv_eeh_set_option,\n \t.get_pe_addr = pnv_eeh_get_pe_addr,\ndiff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c\nindex b900eb1d5e17..24e52fa0c8b7 100644\n--- a/arch/powerpc/platforms/powernv/pci-ioda.c\n+++ b/arch/powerpc/platforms/powernv/pci-ioda.c\n@@ -3294,8 +3294,7 @@ static void pnv_pci_ioda_fixup(void)\n \tpnv_pci_ioda_create_dbgfs();\n \n #ifdef CONFIG_EEH\n-\teeh_init();\n-\teeh_addr_cache_build();\n+\tpnv_eeh_post_init();\n #endif\n }\n \ndiff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h\nindex f16bc403ec03..31f5f99be39a 100644\n--- a/arch/powerpc/platforms/powernv/pci.h\n+++ b/arch/powerpc/platforms/powernv/pci.h\n@@ -229,6 +229,7 @@ extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);\n extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev);\n extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq);\n extern bool pnv_pci_enable_device_hook(struct pci_dev *dev);\n+extern int pnv_eeh_post_init(void);\n \n extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level,\n \t\t\t const char *fmt, ...);\n","prefixes":["2/2"]}