{"id":810722,"url":"http://patchwork.ozlabs.org/api/patches/810722/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906160612.22769-30-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170906160612.22769-30-richard.henderson@linaro.org>","list_archive_url":null,"date":"2017-09-06T16:06:09","name":"[PULL,29/32] target/arm: [a64] Move page and ss checks to init_disas_context","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"288e91602b291d25534d5b473a01b03ae77a5a28","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906160612.22769-30-richard.henderson@linaro.org/mbox/","series":[{"id":1847,"url":"http://patchwork.ozlabs.org/api/series/1847/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1847","date":"2017-09-06T16:05:41","name":"[PULL,01/32] tcg: Add generic DISAS_NORETURN","version":1,"mbox":"http://patchwork.ozlabs.org/series/1847/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810722/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810722/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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Also, we can check for single-step once.\n\nReviewed-by: Emilio G. Cota \nSigned-off-by: Richard Henderson \n---\n target/arm/translate-a64.c | 17 +++++++++--------\n 1 file changed, 9 insertions(+), 8 deletions(-)","diff":"diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c\nindex 25c6622825..9017e30510 100644\n--- a/target/arm/translate-a64.c\n+++ b/target/arm/translate-a64.c\n@@ -11206,6 +11206,7 @@ static int aarch64_tr_init_disas_context(DisasContextBase *dcbase,\n DisasContext *dc = container_of(dcbase, DisasContext, base);\n CPUARMState *env = cpu->env_ptr;\n ARMCPU *arm_cpu = arm_env_get_cpu(env);\n+ int bound;\n \n dc->pc = dc->base.pc_first;\n dc->condjmp = 0;\n@@ -11254,8 +11255,14 @@ static int aarch64_tr_init_disas_context(DisasContextBase *dcbase,\n dc->is_ldex = false;\n dc->ss_same_el = (arm_debug_target_el(env) == dc->current_el);\n \n- dc->next_page_start =\n- (dc->base.pc_first & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;\n+ /* Bound the number of insns to execute to those left on the page. */\n+ bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;\n+\n+ /* If architectural single step active, limit to 1. */\n+ if (dc->ss_active) {\n+ bound = 1;\n+ }\n+ max_insns = MIN(max_insns, bound);\n \n init_tmp_a64_array(dc);\n \n@@ -11323,12 +11330,6 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)\n disas_a64_insn(env, dc);\n }\n \n- if (dc->base.is_jmp == DISAS_NEXT) {\n- if (dc->ss_active || dc->pc >= dc->next_page_start) {\n- dc->base.is_jmp = DISAS_TOO_MANY;\n- }\n- }\n-\n dc->base.pc_next = dc->pc;\n translator_loop_temp_check(&dc->base);\n }\n","prefixes":["PULL","29/32"]}