{"id":810647,"url":"http://patchwork.ozlabs.org/api/patches/810647/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906144940.30880-3-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170906144940.30880-3-richard.henderson@linaro.org>","list_archive_url":null,"date":"2017-09-06T14:49:28","name":"[PULL,02/14] tcg: Add tcg target default memory ordering","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"adf823ad52999ee0737bdce6ef2c826f5d38ffa0","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906144940.30880-3-richard.henderson@linaro.org/mbox/","series":[{"id":1829,"url":"http://patchwork.ozlabs.org/api/series/1829/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1829","date":"2017-09-06T14:49:28","name":"[PULL,01/14] tcg: Remove support for ia64 as host","version":1,"mbox":"http://patchwork.ozlabs.org/series/1829/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810647/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810647/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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-0700","Message-Id":"<20170906144940.30880-3-richard.henderson@linaro.org>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170906144940.30880-1-richard.henderson@linaro.org>","References":"<20170906144940.30880-1-richard.henderson@linaro.org>","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400e:c05::22a","Subject":"[Qemu-devel] [PULL 02/14] tcg: Add tcg target default memory\n\tordering","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"peter.maydell@linaro.org, Pranith Kumar <bobby.prani@gmail.com>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"From: Pranith Kumar <bobby.prani@gmail.com>\n\nSigned-off-by: Pranith Kumar <bobby.prani@gmail.com>\nMessage-Id: <20170829063313.10237-3-bobby.prani@gmail.com>\n[rth: Dropped ia64 hunk]\nSigned-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n tcg/aarch64/tcg-target.h | 2 ++\n tcg/arm/tcg-target.h     | 2 ++\n tcg/mips/tcg-target.h    | 2 ++\n tcg/ppc/tcg-target.h     | 2 ++\n tcg/s390/tcg-target.h    | 2 ++\n tcg/sparc/tcg-target.h   | 2 ++\n 6 files changed, 12 insertions(+)","diff":"diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h\nindex 55a46ac825..b41a248bee 100644\n--- a/tcg/aarch64/tcg-target.h\n+++ b/tcg/aarch64/tcg-target.h\n@@ -117,4 +117,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)\n     __builtin___clear_cache((char *)start, (char *)stop);\n }\n \n+#define TCG_TARGET_DEFAULT_MO (0)\n+\n #endif /* AARCH64_TCG_TARGET_H */\ndiff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h\nindex 5ef1086710..a38be15a39 100644\n--- a/tcg/arm/tcg-target.h\n+++ b/tcg/arm/tcg-target.h\n@@ -134,4 +134,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)\n     __builtin___clear_cache((char *) start, (char *) stop);\n }\n \n+#define TCG_TARGET_DEFAULT_MO (0)\n+\n #endif\ndiff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h\nindex d75cb63ed3..e9558d15bc 100644\n--- a/tcg/mips/tcg-target.h\n+++ b/tcg/mips/tcg-target.h\n@@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)\n     cacheflush ((void *)start, stop-start, ICACHE);\n }\n \n+#define TCG_TARGET_DEFAULT_MO (0)\n+\n #endif\ndiff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h\nindex 5f4a40a5b4..5a092b038a 100644\n--- a/tcg/ppc/tcg-target.h\n+++ b/tcg/ppc/tcg-target.h\n@@ -125,4 +125,6 @@ extern bool have_isa_3_00;\n \n void flush_icache_range(uintptr_t start, uintptr_t stop);\n \n+#define TCG_TARGET_DEFAULT_MO (0)\n+\n #endif\ndiff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h\nindex 957f0c0afe..dc0e59193c 100644\n--- a/tcg/s390/tcg-target.h\n+++ b/tcg/s390/tcg-target.h\n@@ -133,6 +133,8 @@ extern uint64_t s390_facilities;\n \n #define TCG_TARGET_EXTEND_ARGS 1\n \n+#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)\n+\n enum {\n     TCG_AREG0 = TCG_REG_R10,\n };\ndiff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h\nindex 854a0afd70..4515c9ab48 100644\n--- a/tcg/sparc/tcg-target.h\n+++ b/tcg/sparc/tcg-target.h\n@@ -162,6 +162,8 @@ extern bool use_vis3_instructions;\n \n #define TCG_AREG0 TCG_REG_I0\n \n+#define TCG_TARGET_DEFAULT_MO (0)\n+\n static inline void flush_icache_range(uintptr_t start, uintptr_t stop)\n {\n     uintptr_t p;\n","prefixes":["PULL","02/14"]}