{"id":810396,"url":"http://patchwork.ozlabs.org/api/patches/810396/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-10-wenyou.yang@microchip.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170906052343.17989-10-wenyou.yang@microchip.com>","list_archive_url":null,"date":"2017-09-06T05:23:40","name":"[U-Boot,v4,09/12] board: sama5d2_xplained: Make SPL work on spiflash","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"b68a2a255fb8ce81731cffea359e676af3050500","submitter":{"id":69532,"url":"http://patchwork.ozlabs.org/api/people/69532/?format=json","name":"Wenyou Yang","email":"Wenyou.Yang@microchip.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-10-wenyou.yang@microchip.com/mbox/","series":[{"id":1695,"url":"http://patchwork.ozlabs.org/api/series/1695/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1695","date":"2017-09-06T05:23:31","name":"board: atmel: Add new board SAMA5D27-SOM1-EK board.","version":4,"mbox":"http://patchwork.ozlabs.org/series/1695/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810396/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810396/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnBwN58J7z9s7C\n\tfor ;\n\tWed, 6 Sep 2017 15:29:24 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 69270C21DBE; Wed, 6 Sep 2017 05:28:36 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 36AE3C21DE1;\n\tWed, 6 Sep 2017 05:28:35 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 9B3C0C21EF6; Wed, 6 Sep 2017 05:25:51 +0000 (UTC)","from DVREDG01.corp.atmel.com (nasmtp01.atmel.com [192.199.1.245])\n\tby lists.denx.de (Postfix) with ESMTPS id 6F332C21DEB\n\tfor ; Wed, 6 Sep 2017 05:25:49 +0000 (UTC)","from apsmtp01.atmel.com (10.168.254.31) by DVREDG01.corp.atmel.com\n\t(10.42.103.30) with Microsoft SMTP Server (TLS) id 14.3.235.1;\n\tTue, 5 Sep 2017 23:25:06 -0600","from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com\n\t(10.168.254.31) with Microsoft SMTP Server id 14.3.235.1;\n\tWed, 6 Sep 2017 13:29:24 +0800"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED\n\tautolearn=unavailable autolearn_force=no version=3.4.0","From":"Wenyou Yang ","To":"U-Boot Mailing List ","Date":"Wed, 6 Sep 2017 13:23:40 +0800","Message-ID":"<20170906052343.17989-10-wenyou.yang@microchip.com>","X-Mailer":"git-send-email 2.13.0","In-Reply-To":"<20170906052343.17989-1-wenyou.yang@microchip.com>","References":"<20170906052343.17989-1-wenyou.yang@microchip.com>","MIME-Version":"1.0","Cc":"Marek Vasut , Tom Rini ","Subject":"[U-Boot] [PATCH v4 09/12] board: sama5d2_xplained: Make SPL work on\n\tspiflash","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Because before switching to a lower clock source, we must switch\nthe clock source first instead of last. So before configuring the\nPMC_MCKR register, invoke at91_mck_init_down() first.\n\nAs said in datasheet, the the size of SPL must not exceed the maximum\nsize allowed(64Kbytes).\n\nSigned-off-by: Wenyou Yang \n---\n\nChanges in v4: None\nChanges in v3: None\nChanges in v2: None\n\n board/atmel/sama5d2_xplained/sama5d2_xplained.c | 10 ++++++++++\n include/configs/sama5d2_xplained.h | 2 +-\n 2 files changed, 11 insertions(+), 1 deletion(-)","diff":"diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c\nindex 7e0cb4228f..5758653030 100644\n--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c\n+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c\n@@ -247,6 +247,16 @@ void at91_pmc_init(void)\n \tstruct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;\n \tu32 tmp;\n \n+\t/*\n+\t * while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz\n+\t * so we need to slow down and configure MCKR accordingly.\n+\t * This is why we have a special flavor of the switching function.\n+\t */\n+\ttmp = AT91_PMC_MCKR_PLLADIV_2 |\n+\t AT91_PMC_MCKR_MDIV_3 |\n+\t AT91_PMC_MCKR_CSS_MAIN;\n+\tat91_mck_init_down(tmp);\n+\n \ttmp = AT91_PMC_PLLAR_29 |\n \t AT91_PMC_PLLXR_PLLCOUNT(0x3f) |\n \t AT91_PMC_PLLXR_MUL(82) |\ndiff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h\nindex 891218d83e..aedd5684c4 100644\n--- a/include/configs/sama5d2_xplained.h\n+++ b/include/configs/sama5d2_xplained.h\n@@ -61,7 +61,7 @@\n /* SPL */\n #define CONFIG_SPL_FRAMEWORK\n #define CONFIG_SPL_TEXT_BASE\t\t0x200000\n-#define CONFIG_SPL_MAX_SIZE\t\t0x18000\n+#define CONFIG_SPL_MAX_SIZE\t\t0x10000\n #define CONFIG_SPL_BSS_START_ADDR\t0x20000000\n #define CONFIG_SPL_BSS_MAX_SIZE\t\t0x80000\n #define CONFIG_SYS_SPL_MALLOC_START\t0x20080000\n","prefixes":["U-Boot","v4","09/12"]}