{"id":810393,"url":"http://patchwork.ozlabs.org/api/patches/810393/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-7-wenyou.yang@microchip.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170906052343.17989-7-wenyou.yang@microchip.com>","list_archive_url":null,"date":"2017-09-06T05:23:37","name":"[U-Boot,v4,06/12] ARM: at91: spl: Adjust switching to oscillator for SAMA5D2","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"3364bca57dffd0025444cb3c97e5d4f9e98bef41","submitter":{"id":69532,"url":"http://patchwork.ozlabs.org/api/people/69532/?format=json","name":"Wenyou Yang","email":"Wenyou.Yang@microchip.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-7-wenyou.yang@microchip.com/mbox/","series":[{"id":1695,"url":"http://patchwork.ozlabs.org/api/series/1695/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1695","date":"2017-09-06T05:23:31","name":"board: atmel: Add new board SAMA5D27-SOM1-EK board.","version":4,"mbox":"http://patchwork.ozlabs.org/series/1695/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810393/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810393/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnBtc36jTz9s7C\n\tfor ;\n\tWed, 6 Sep 2017 15:27:52 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 0368DC21CB6; Wed, 6 Sep 2017 05:26:16 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id D799CC21E30;\n\tWed, 6 Sep 2017 05:26:13 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 72532C21E0A; Wed, 6 Sep 2017 05:25:36 +0000 (UTC)","from DVREDG02.corp.atmel.com (nasmtp01.atmel.com [192.199.1.246])\n\tby lists.denx.de (Postfix) with ESMTPS id 2A8A4C21E64\n\tfor ; Wed, 6 Sep 2017 05:25:34 +0000 (UTC)","from apsmtp01.atmel.com (10.168.254.31) by DVREDG02.corp.atmel.com\n\t(10.42.103.31) with Microsoft SMTP Server (TLS) id 14.3.235.1;\n\tTue, 5 Sep 2017 23:24:51 -0600","from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com\n\t(10.168.254.31) with Microsoft SMTP Server id 14.3.235.1;\n\tWed, 6 Sep 2017 13:29:09 +0800"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED\n\tautolearn=unavailable autolearn_force=no version=3.4.0","From":"Wenyou Yang ","To":"U-Boot Mailing List ","Date":"Wed, 6 Sep 2017 13:23:37 +0800","Message-ID":"<20170906052343.17989-7-wenyou.yang@microchip.com>","X-Mailer":"git-send-email 2.13.0","In-Reply-To":"<20170906052343.17989-1-wenyou.yang@microchip.com>","References":"<20170906052343.17989-1-wenyou.yang@microchip.com>","MIME-Version":"1.0","Cc":"Marek Vasut , Tom Rini ","Subject":"[U-Boot] [PATCH v4 06/12] ARM: at91: spl: Adjust switching to\n\toscillator for SAMA5D2","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"As said in 29.5.7 section of SAMA5D2 datasheet, before switching to\nthe crystal oscillator, a check must be carried out to ensure that\nthe oscillator is present and that its freqency is valid.\n\nSigned-off-by: Wenyou Yang \nReviewed-by: Simon Glass \n---\n\nChanges in v4: None\nChanges in v3: None\nChanges in v2: None\n\n arch/arm/mach-at91/include/mach/at91_pmc.h | 2 ++\n arch/arm/mach-at91/spl_atmel.c | 18 +++++++++++++++++-\n 2 files changed, 19 insertions(+), 1 deletion(-)","diff":"diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h\nindex 2875ff20b1..08ad1bf2d0 100644\n--- a/arch/arm/mach-at91/include/mach/at91_pmc.h\n+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h\n@@ -87,6 +87,8 @@ typedef struct at91_pmc {\n \n #define AT91_PMC_MCFR_MAINRDY\t\t0x00010000\n #define AT91_PMC_MCFR_MAINF_MASK\t0x0000FFFF\n+#define AT91_PMC_MCFR_RCMEAS\t\t0x00100000\n+#define AT91_PMC_MCFR_CCSS_XTAL_OSC\t0x01000000\n \n #define AT91_PMC_MCKR_CSS_SLOW\t\t0x00000000\n #define AT91_PMC_MCKR_CSS_MAIN\t\t0x00000001\ndiff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c\nindex b75c2ccefd..ce16ef3bdb 100644\n--- a/arch/arm/mach-at91/spl_atmel.c\n+++ b/arch/arm/mach-at91/spl_atmel.c\n@@ -32,6 +32,20 @@ static void switch_to_main_crystal_osc(void)\n \twhile (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))\n \t\t;\n \n+#if defined(CONFIG_SAMA5D2)\n+\t/* Enable a measurement of the external oscillator */\n+\ttmp = readl(&pmc->mcfr);\n+\ttmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;\n+\ttmp |= AT91_PMC_MCFR_RCMEAS;\n+\twritel(tmp, &pmc->mcfr);\n+\n+\twhile (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))\n+\t\t;\n+\n+\tif (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))\n+\t\thang();\n+#endif\n+\n \ttmp = readl(&pmc->mor);\n \ttmp &= ~AT91_PMC_MOR_OSCBYPASS;\n \ttmp &= ~AT91_PMC_MOR_KEY(0xff);\n@@ -47,11 +61,13 @@ static void switch_to_main_crystal_osc(void)\n \twhile (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))\n \t\t;\n \n+#if !defined(CONFIG_SAMA5D2)\n \t/* Wait until MAINRDY field is set to make sure main clock is stable */\n \twhile (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))\n \t\t;\n+#endif\n \n-#ifndef CONFIG_SAMA5D4\n+#if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)\n \ttmp = readl(&pmc->mor);\n \ttmp &= ~AT91_PMC_MOR_MOSCRCEN;\n \ttmp &= ~AT91_PMC_MOR_KEY(0xff);\n","prefixes":["U-Boot","v4","06/12"]}