{"id":810088,"url":"http://patchwork.ozlabs.org/api/patches/810088/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170905112152.8851-1-ppandit@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170905112152.8851-1-ppandit@redhat.com>","list_archive_url":null,"date":"2017-09-05T11:21:52","name":"intc: arm_gicv3: limit GICR ipriority index","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e15eddb40dcfee7394a2aa5b07968023803c0fe0","submitter":{"id":67408,"url":"http://patchwork.ozlabs.org/api/people/67408/?format=json","name":"Prasad Pandit","email":"ppandit@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170905112152.8851-1-ppandit@redhat.com/mbox/","series":[{"id":1557,"url":"http://patchwork.ozlabs.org/api/series/1557/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1557","date":"2017-09-05T11:21:52","name":"intc: arm_gicv3: limit GICR ipriority index","version":1,"mbox":"http://patchwork.ozlabs.org/series/1557/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810088/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810088/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=ppandit@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmkrT3FLjz9s3T\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue,  5 Sep 2017 21:24:25 +1000 (AEST)","from localhost ([::1]:58184 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dpBxv-0001x8-Ig\n\tfor incoming@patchwork.ozlabs.org; Tue, 05 Sep 2017 07:24:23 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:49601)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <ppandit@redhat.com>) id 1dpBw1-0000uM-AU\n\tfor qemu-devel@nongnu.org; Tue, 05 Sep 2017 07:22:30 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <ppandit@redhat.com>) id 1dpBvw-0005um-Ki\n\tfor qemu-devel@nongnu.org; Tue, 05 Sep 2017 07:22:25 -0400","from mx1.redhat.com ([209.132.183.28]:39374)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <ppandit@redhat.com>)\n\tid 1dpBvj-0005f6-RA; Tue, 05 Sep 2017 07:22:07 -0400","from smtp.corp.redhat.com\n\t(int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id A443B7F3F6;\n\tTue,  5 Sep 2017 11:22:06 +0000 (UTC)","from localhost.localdomain (vpn2-54-49.bne.redhat.com\n\t[10.64.54.49])\n\tby smtp.corp.redhat.com (Postfix) with ESMTPS id 15CAD6BE6C;\n\tTue,  5 Sep 2017 11:22:01 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com A443B7F3F6","From":"P J P <ppandit@redhat.com>","To":"qemu-devel@nongnu.org","Date":"Tue,  5 Sep 2017 16:51:52 +0530","Message-Id":"<20170905112152.8851-1-ppandit@redhat.com>","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.15","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.25]);\n\tTue, 05 Sep 2017 11:22:06 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [PATCH] intc: arm_gicv3: limit GICR ipriority index","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org,\n\tPrasad J Pandit <pjp@fedoraproject.org>,\n\tGuoxiang Niu <niuguoxiang@huawei.com>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"From: Prasad J Pandit <pjp@fedoraproject.org>\n\nWhen reading or writing to GICR ipriority array, index 'irq'\ncould go beyond its bounds; Restrict it within array limits.\n\nReported-by: Guoxiang Niu <niuguoxiang@huawei.com>\nSigned-off-by: Prasad J Pandit <pjp@fedoraproject.org>\n---\n hw/intc/arm_gicv3_redist.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)","diff":"diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c\nindex 77e5cfa327..7683c4cc7f 100644\n--- a/hw/intc/arm_gicv3_redist.c\n+++ b/hw/intc/arm_gicv3_redist.c\n@@ -187,7 +187,7 @@ static MemTxResult gicr_readl(GICv3CPUState *cs, hwaddr offset,\n     case GICR_ICACTIVER0:\n         *data = gicr_read_bitmap_reg(cs, attrs, cs->gicr_iactiver0);\n         return MEMTX_OK;\n-    case GICR_IPRIORITYR ... GICR_IPRIORITYR + 0x1f:\n+    case GICR_IPRIORITYR ... GICR_IPRIORITYR + 0x1c:\n     {\n         int i, irq = offset - GICR_IPRIORITYR;\n         uint32_t value = 0;\n@@ -310,7 +310,7 @@ static MemTxResult gicr_writel(GICv3CPUState *cs, hwaddr offset,\n     case GICR_ICACTIVER0:\n         gicr_write_clear_bitmap_reg(cs, attrs, &cs->gicr_iactiver0, value);\n         return MEMTX_OK;\n-    case GICR_IPRIORITYR ... GICR_IPRIORITYR + 0x1f:\n+    case GICR_IPRIORITYR ... GICR_IPRIORITYR + 0x1c:\n     {\n         int i, irq = offset - GICR_IPRIORITYR;\n \n","prefixes":[]}