{"id":810003,"url":"http://patchwork.ozlabs.org/api/patches/810003/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170905084306.19318-5-mperttunen@nvidia.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170905084306.19318-5-mperttunen@nvidia.com>","list_archive_url":null,"date":"2017-09-05T08:43:04","name":"[v2,4/6] dt-bindings: host1x: Add Tegra186 information","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"318f1d5e1667210e0b510bb5df6543daaab96b10","submitter":{"id":26499,"url":"http://patchwork.ozlabs.org/api/people/26499/?format=json","name":"Mikko Perttunen","email":"mperttunen@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170905084306.19318-5-mperttunen@nvidia.com/mbox/","series":[{"id":1516,"url":"http://patchwork.ozlabs.org/api/series/1516/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=1516","date":"2017-09-05T08:43:04","name":"Host1x and VIC support for Tegra186","version":2,"mbox":"http://patchwork.ozlabs.org/series/1516/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810003/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810003/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tsecure) header.d=kapsi.fi header.i=@kapsi.fi header.b=\"1vXgAdMk\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmgHf2Y8Kz9sP3\n\tfor ;\n\tTue, 5 Sep 2017 18:44:14 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750944AbdIEInr (ORCPT\n\t);\n\tTue, 5 Sep 2017 04:43:47 -0400","from mail.kapsi.fi ([91.232.154.25]:48730 \"EHLO mail.kapsi.fi\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750762AbdIEInp (ORCPT );\n\tTue, 5 Sep 2017 04:43:45 -0400","from dsl-hkibng41-567306-181.dhcp.inet.fi ([86.115.6.181]\n\thelo=localhost.localdomain) by mail.kapsi.fi with esmtpsa\n\t(TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n\t(Exim 4.84_2) (envelope-from )\n\tid 1dp9SM-0005vW-Mg; Tue, 05 Sep 2017 11:43:38 +0300"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kapsi.fi; \n\ts=20161220; \n\th=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From;\n\tbh=gKesJ/itDCN3TQu2Z++SKy9S2xXGa1HOZj61L8aDMlQ=; \n\tb=1vXgAdMk0lCigKllYeku75AS3Z+rEmZsQLwFrit/ErQ/vHMVYSAxe0ISPPlOicRBb6Ka2a2tZu+7EONg6iZK30W5VOER8gYygl0WG4lPnIwd8Hmfv+dxWrdZEwehEQ+tsnYw2TwhOx6uqYNxN9wIw/LZmj8dNmRhe8yhg6QIC53bU7SM6BacZI8/B6aaa0USAMOYYrCn9CtQPwTkUE+Z4Z38j9jaLJwgD0aMgBHgbRlT/LNZW/AOGJ11ShIQmeoovODk5nCqMaBeOwT9AMImktQuAAf0QubJTbsI0ROxLZh9NUAk2fgrbD4vsR9LfZNeRQkatNu1tGIsnBF/2NaswQ==;","From":"Mikko Perttunen ","To":"thierry.reding@gmail.com, jonathanh@nvidia.com, robh+dt@kernel.org,\n\tmark.rutland@arm.com","Cc":"digetx@gmail.com, amerilainen@nvidia.com, dnibade@nvidia.com,\n\tsgurrappadi@nvidia.com, dri-devel@lists.freedesktop.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tMikko Perttunen ","Subject":"[PATCH v2 4/6] dt-bindings: host1x: Add Tegra186 information","Date":"Tue, 5 Sep 2017 11:43:04 +0300","Message-Id":"<20170905084306.19318-5-mperttunen@nvidia.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170905084306.19318-1-mperttunen@nvidia.com>","References":"<20170905084306.19318-1-mperttunen@nvidia.com>","X-SA-Exim-Connect-IP":"86.115.6.181","X-SA-Exim-Mail-From":"mperttunen@nvidia.com","X-SA-Exim-Scanned":"No (on mail.kapsi.fi); SAEximRunCond expanded to false","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Add the Tegra186-specific hypervisor-related register range\nproperties.\n\nSigned-off-by: Mikko Perttunen \n---\nv2:\n- Dropped incorrect note about cells properties.\n\n .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++++\n 1 file changed, 4 insertions(+)","diff":"diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt\nindex 74e1e8add5a1..844e0103fb0d 100644\n--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt\n+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt\n@@ -3,6 +3,10 @@ NVIDIA Tegra host1x\n Required properties:\n - compatible: \"nvidia,tegra-host1x\"\n - reg: Physical base address and length of the controller's registers.\n+ For pre-Tegra186, one entry describing the whole register area.\n+ For Tegra186, one entry for each entry in reg-names:\n+ \"vm\" - VM region assigned to Linux\n+ \"hypervisor\" - Hypervisor region (only if Linux acts as hypervisor)\n - interrupts: The interrupt outputs from the controller.\n - #address-cells: The number of cells used to represent physical base addresses\n in the host1x address space. Should be 1.\n","prefixes":["v2","4/6"]}