{"id":809660,"url":"http://patchwork.ozlabs.org/api/patches/809660/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504527967-29248-37-git-send-email-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504527967-29248-37-git-send-email-peter.maydell@linaro.org>","list_archive_url":null,"date":"2017-09-04T12:26:07","name":"[PULL,36/36] arm_gicv3_kvm: Fix compile warning","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d6ed5d5afb43d6d61d28bd588dc248732bc5665c","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504527967-29248-37-git-send-email-peter.maydell@linaro.org/mbox/","series":[{"id":1366,"url":"http://patchwork.ozlabs.org/api/series/1366/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1366","date":"2017-09-04T12:25:36","name":"[PULL,01/36] target/arm: Use MMUAccessType enum rather than int","version":1,"mbox":"http://patchwork.ozlabs.org/series/1366/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/809660/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809660/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm8qp1n08z9t39\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon,  4 Sep 2017 22:51:49 +1000 (AEST)","from localhost ([::1]:59666 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1doqqy-0007aR-0O\n\tfor incoming@patchwork.ozlabs.org; Mon, 04 Sep 2017 08:51:48 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:52956)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSk-0005Fs-Bx\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:54 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSY-00052l-2m\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:46 -0400","from orth.archaic.org.uk ([2001:8b0:1d0::2]:37140)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <pm215@archaic.org.uk>)\n\tid 1doqSX-000503-PL\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:34 -0400","from pm215 by orth.archaic.org.uk with local (Exim 4.89)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSW-0005ej-IT\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 13:26:32 +0100"],"From":"Peter Maydell <peter.maydell@linaro.org>","To":"qemu-devel@nongnu.org","Date":"Mon,  4 Sep 2017 13:26:07 +0100","Message-Id":"<1504527967-29248-37-git-send-email-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1504527967-29248-1-git-send-email-peter.maydell@linaro.org>","References":"<1504527967-29248-1-git-send-email-peter.maydell@linaro.org>","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2001:8b0:1d0::2","Subject":"[Qemu-devel] [PULL 36/36] arm_gicv3_kvm: Fix compile warning","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"From: Pranith Kumar <bobby.prani@gmail.com>\n\nFix the following warning:\n\n/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses]\n            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {\n                ^             ~\n/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses after the '!' to evaluate the bitwise operator first\n            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {\n                ^\n/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses around left hand side expression to silence this warning\n            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {\n                ^\n\nThis logic error meant we were not setting the PTZ\nbit when we should -- luckily as the comment suggests\nthis wouldn't have had any effects beyond making GIC\ninitialization take a little longer.\n\nSigned-off-by: Pranith Kumar <bobby.prani@gmail.com>\nMessage-id: 20170829173226.7625-1-bobby.prani@gmail.com\nCc: qemu-stable@nongnu.org\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n hw/intc/arm_gicv3_kvm.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c\nindex 6051c77..481fe54 100644\n--- a/hw/intc/arm_gicv3_kvm.c\n+++ b/hw/intc/arm_gicv3_kvm.c\n@@ -293,7 +293,7 @@ static void kvm_arm_gicv3_put(GICv3State *s)\n             kvm_gicr_access(s, GICR_PROPBASER + 4, ncpu, &regh, true);\n \n             reg64 = c->gicr_pendbaser;\n-            if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {\n+            if (!(c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS)) {\n                 /* Setting PTZ is advised if LPIs are disabled, to reduce\n                  * GIC initialization time.\n                  */\n","prefixes":["PULL","36/36"]}