{"id":809645,"url":"http://patchwork.ozlabs.org/api/patches/809645/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504527967-29248-23-git-send-email-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504527967-29248-23-git-send-email-peter.maydell@linaro.org>","list_archive_url":null,"date":"2017-09-04T12:25:53","name":"[PULL,22/36] target/arm/kvm: pmu: improve error handling","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0f4deccb73e633c25093bd44a07a3119bd9cc3be","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504527967-29248-23-git-send-email-peter.maydell@linaro.org/mbox/","series":[{"id":1366,"url":"http://patchwork.ozlabs.org/api/series/1366/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1366","date":"2017-09-04T12:25:36","name":"[PULL,01/36] target/arm: Use MMUAccessType enum rather than int","version":1,"mbox":"http://patchwork.ozlabs.org/series/1366/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/809645/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809645/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm8cw4CFQz9t2Z\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon,  4 Sep 2017 22:42:24 +1000 (AEST)","from localhost ([::1]:59619 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1doqhq-0008JZ-MW\n\tfor incoming@patchwork.ozlabs.org; Mon, 04 Sep 2017 08:42:22 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:52712)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSY-00057f-NW\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:47 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSK-0004rc-AM\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:34 -0400","from orth.archaic.org.uk ([2001:8b0:1d0::2]:37126)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <pm215@archaic.org.uk>)\n\tid 1doqSK-0004qw-2a\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:20 -0400","from pm215 by orth.archaic.org.uk with local (Exim 4.89)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSJ-0005Yk-4B\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 13:26:19 +0100"],"From":"Peter Maydell <peter.maydell@linaro.org>","To":"qemu-devel@nongnu.org","Date":"Mon,  4 Sep 2017 13:25:53 +0100","Message-Id":"<1504527967-29248-23-git-send-email-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1504527967-29248-1-git-send-email-peter.maydell@linaro.org>","References":"<1504527967-29248-1-git-send-email-peter.maydell@linaro.org>","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2001:8b0:1d0::2","Subject":"[Qemu-devel] [PULL 22/36] target/arm/kvm: pmu: improve error\n\thandling","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"From: Andrew Jones <drjones@redhat.com>\n\nIf a KVM PMU init or set-irq attr call fails we just silently stop\nthe PMU DT node generation. The only way they could fail, though,\nis if the attr's respective KVM has-attr call fails. But that should\nnever happen if KVM advertises the PMU capability, because both\nattrs have been available since the capability was introduced. Let's\njust abort if this should-never-happen stuff does happen, because,\nif it does, then something is obviously horribly wrong.\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Christoffer Dall <cdall@linaro.org>\nMessage-id: 1500471597-2517-5-git-send-email-drjones@redhat.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n target/arm/kvm_arm.h | 15 ++++-----------\n hw/arm/virt.c        |  9 +++------\n target/arm/kvm32.c   |  3 +--\n target/arm/kvm64.c   | 28 ++++++++++++++++++++--------\n 4 files changed, 28 insertions(+), 27 deletions(-)","diff":"diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h\nindex cab5ea9..ff53e9f 100644\n--- a/target/arm/kvm_arm.h\n+++ b/target/arm/kvm_arm.h\n@@ -195,8 +195,8 @@ int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu);\n \n int kvm_arm_vgic_probe(void);\n \n-int kvm_arm_pmu_set_irq(CPUState *cs, int irq);\n-int kvm_arm_pmu_init(CPUState *cs);\n+void kvm_arm_pmu_set_irq(CPUState *cs, int irq);\n+void kvm_arm_pmu_init(CPUState *cs);\n \n #else\n \n@@ -205,15 +205,8 @@ static inline int kvm_arm_vgic_probe(void)\n     return 0;\n }\n \n-static inline int kvm_arm_pmu_set_irq(CPUState *cs, int irq)\n-{\n-    return 0;\n-}\n-\n-static inline int kvm_arm_pmu_init(CPUState *cs)\n-{\n-    return 0;\n-}\n+static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {}\n+static inline void kvm_arm_pmu_init(CPUState *cs) {}\n \n #endif\n \ndiff --git a/hw/arm/virt.c b/hw/arm/virt.c\nindex 999f448..fe96557 100644\n--- a/hw/arm/virt.c\n+++ b/hw/arm/virt.c\n@@ -496,13 +496,10 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms)\n             return;\n         }\n         if (kvm_enabled()) {\n-            if (kvm_irqchip_in_kernel() &&\n-                !kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ))) {\n-                return;\n-            }\n-            if (!kvm_arm_pmu_init(cpu)) {\n-                return;\n+            if (kvm_irqchip_in_kernel()) {\n+                kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ));\n             }\n+            kvm_arm_pmu_init(cpu);\n         }\n     }\n \ndiff --git a/target/arm/kvm32.c b/target/arm/kvm32.c\nindex e3aab89..717a256 100644\n--- a/target/arm/kvm32.c\n+++ b/target/arm/kvm32.c\n@@ -522,10 +522,9 @@ bool kvm_arm_hw_debug_active(CPUState *cs)\n     return false;\n }\n \n-int kvm_arm_pmu_set_irq(CPUState *cs, int irq)\n+void kvm_arm_pmu_set_irq(CPUState *cs, int irq)\n {\n     qemu_log_mask(LOG_UNIMP, \"%s: not implemented\\n\", __func__);\n-    return 0;\n }\n \n int kvm_arm_pmu_init(CPUState *cs)\ndiff --git a/target/arm/kvm64.c b/target/arm/kvm64.c\nindex ec7d853..6554c30 100644\n--- a/target/arm/kvm64.c\n+++ b/target/arm/kvm64.c\n@@ -387,30 +387,36 @@ static bool kvm_arm_pmu_set_attr(CPUState *cs, struct kvm_device_attr *attr)\n \n     err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr);\n     if (err != 0) {\n+        error_report(\"PMU: KVM_HAS_DEVICE_ATTR: %s\", strerror(-err));\n         return false;\n     }\n \n     err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr);\n-    if (err < 0) {\n-        fprintf(stderr, \"KVM_SET_DEVICE_ATTR failed: %s\\n\",\n-                strerror(-err));\n-        abort();\n+    if (err != 0) {\n+        error_report(\"PMU: KVM_SET_DEVICE_ATTR: %s\", strerror(-err));\n+        return false;\n     }\n \n     return true;\n }\n \n-int kvm_arm_pmu_init(CPUState *cs)\n+void kvm_arm_pmu_init(CPUState *cs)\n {\n     struct kvm_device_attr attr = {\n         .group = KVM_ARM_VCPU_PMU_V3_CTRL,\n         .attr = KVM_ARM_VCPU_PMU_V3_INIT,\n     };\n \n-    return kvm_arm_pmu_set_attr(cs, &attr);\n+    if (!ARM_CPU(cs)->has_pmu) {\n+        return;\n+    }\n+    if (!kvm_arm_pmu_set_attr(cs, &attr)) {\n+        error_report(\"failed to init PMU\");\n+        abort();\n+    }\n }\n \n-int kvm_arm_pmu_set_irq(CPUState *cs, int irq)\n+void kvm_arm_pmu_set_irq(CPUState *cs, int irq)\n {\n     struct kvm_device_attr attr = {\n         .group = KVM_ARM_VCPU_PMU_V3_CTRL,\n@@ -418,7 +424,13 @@ int kvm_arm_pmu_set_irq(CPUState *cs, int irq)\n         .attr = KVM_ARM_VCPU_PMU_V3_IRQ,\n     };\n \n-    return kvm_arm_pmu_set_attr(cs, &attr);\n+    if (!ARM_CPU(cs)->has_pmu) {\n+        return;\n+    }\n+    if (!kvm_arm_pmu_set_attr(cs, &attr)) {\n+        error_report(\"failed to set irq for PMU\");\n+        abort();\n+    }\n }\n \n static inline void set_feature(uint64_t *features, int feature)\n","prefixes":["PULL","22/36"]}