{"id":809197,"url":"http://patchwork.ozlabs.org/api/patches/809197/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20170903042117.28923-10-saeedm@mellanox.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170903042117.28923-10-saeedm@mellanox.com>","list_archive_url":null,"date":"2017-09-03T04:21:09","name":"[net-next,09/17] net/mlx5e: Non-atomic indicator for ring enabled state","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"a9a58a2281615328952c327fbd29ab79aa03d0aa","submitter":{"id":65299,"url":"http://patchwork.ozlabs.org/api/people/65299/?format=json","name":"Saeed Mahameed","email":"saeedm@mellanox.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170903042117.28923-10-saeedm@mellanox.com/mbox/","series":[{"id":1196,"url":"http://patchwork.ozlabs.org/api/series/1196/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=1196","date":"2017-09-03T04:21:09","name":"[net-next,01/17] net/mlx5e: Reorganize struct mlx5e_rq","version":1,"mbox":"http://patchwork.ozlabs.org/series/1196/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/809197/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809197/checks/","tags":{},"related":[],"headers":{"Return-Path":"<netdev-owner@vger.kernel.org>","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xlKZR6Zdnz9s7C\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSun,  3 Sep 2017 14:22:23 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751522AbdICEWP (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tSun, 3 Sep 2017 00:22:15 -0400","from mail-il-dmz.mellanox.com ([193.47.165.129]:60064 \"EHLO\n\tmellanox.co.il\" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org\n\twith ESMTP id S1751196AbdICEWN (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Sun, 3 Sep 2017 00:22:13 -0400","from Internal Mail-Server by MTLPINE1 (envelope-from\n\tsaeedm@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 3 Sep 2017 07:22:06 +0300","from sws.mtl.labs.mlnx (reg-l-vrt-045-015.mtl.labs.mlnx\n\t[10.135.45.15])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id v834M5lA017672;\n\tSun, 3 Sep 2017 07:22:06 +0300"],"From":"Saeed Mahameed <saeedm@mellanox.com>","To":"\"David S. Miller\" <davem@davemloft.net>","Cc":"netdev@vger.kernel.org, kernel-team@fb.com,\n\tTariq Toukan <tariqt@mellanox.com>, Saeed Mahameed <saeedm@mellanox.com>","Subject":"[net-next 09/17] net/mlx5e: Non-atomic indicator for ring enabled\n\tstate","Date":"Sun,  3 Sep 2017 07:21:09 +0300","Message-Id":"<20170903042117.28923-10-saeedm@mellanox.com>","X-Mailer":"git-send-email 2.13.0","In-Reply-To":"<20170903042117.28923-1-saeedm@mellanox.com>","References":"<20170903042117.28923-1-saeedm@mellanox.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<netdev.vger.kernel.org>","X-Mailing-List":"netdev@vger.kernel.org"},"content":"From: Tariq Toukan <tariqt@mellanox.com>\n\nRings enabled state change occurs in control path only, and is always\nfollowed by a napi_sychronize(), so that following NAPIs read the\nnew value. This read does not need to be atomic.\n\nThe RQ auto-moderation bit is not set/cleared in data-path.\nNo need for atomic read, a regular read operation is sufficient.\nIn RQ creation time as well, there's no multiple threads trying\nto access it yet, hence a regular read can be used.\n\nSigned-off-by: Tariq Toukan <tariqt@mellanox.com>\nSigned-off-by: Saeed Mahameed <saeedm@mellanox.com>\n---\n drivers/net/ethernet/mellanox/mlx5/core/en.h      | 2 ++\n drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 2 +-\n drivers/net/ethernet/mellanox/mlx5/core/en_rx.c   | 8 ++++----\n drivers/net/ethernet/mellanox/mlx5/core/en_tx.c   | 2 +-\n drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | 4 ++--\n 5 files changed, 10 insertions(+), 8 deletions(-)","diff":"diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h\nindex ce8b4f648757..0c4f1f30085a 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h\n@@ -295,6 +295,8 @@ enum {\n \tMLX5E_RQ_STATE_AM,\n };\n \n+#define MLX5E_TEST_BIT(state, nr) (state & BIT(nr))\n+\n struct mlx5e_cq {\n \t/* data path - accessed per cqe */\n \tstruct mlx5_cqwq           wq;\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c\nindex 5aa4681f7c3c..411fb68794bc 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c\n@@ -929,7 +929,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,\n \t\tgoto err_destroy_rq;\n \n \tif (params->rx_am_enabled)\n-\t\tset_bit(MLX5E_RQ_STATE_AM, &c->rq.state);\n+\t\tc->rq.state |= BIT(MLX5E_RQ_STATE_AM);\n \n \treturn 0;\n \ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c\nindex 9d9c13ae6b83..a5522c3992a2 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c\n@@ -424,7 +424,7 @@ void mlx5e_post_rx_mpwqe(struct mlx5e_rq *rq)\n \n \tclear_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state);\n \n-\tif (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state))) {\n+\tif (unlikely(!MLX5E_TEST_BIT(rq->state, MLX5E_RQ_STATE_ENABLED))) {\n \t\tmlx5e_free_rx_mpwqe(rq, &rq->mpwqe.info[wq->head]);\n \t\treturn;\n \t}\n@@ -461,7 +461,7 @@ bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq)\n \tstruct mlx5_wq_ll *wq = &rq->wq;\n \tint err;\n \n-\tif (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state)))\n+\tif (unlikely(!MLX5E_TEST_BIT(rq->state, MLX5E_RQ_STATE_ENABLED)))\n \t\treturn false;\n \n \tif (mlx5_wq_ll_is_full(wq))\n@@ -983,7 +983,7 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)\n \tstruct mlx5_cqe64 *cqe;\n \tint work_done = 0;\n \n-\tif (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state)))\n+\tif (unlikely(!MLX5E_TEST_BIT(rq->state, MLX5E_RQ_STATE_ENABLED)))\n \t\treturn 0;\n \n \tif (cq->decmprs_left)\n@@ -1031,7 +1031,7 @@ bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq)\n \n \tsq = container_of(cq, struct mlx5e_xdpsq, cq);\n \n-\tif (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))\n+\tif (unlikely(!MLX5E_TEST_BIT(sq->state, MLX5E_SQ_STATE_ENABLED)))\n \t\treturn false;\n \n \tcqe = mlx5_cqwq_get_cqe(&cq->wq);\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c\nindex 80d2121643ee..fee43e40fa16 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c\n@@ -403,7 +403,7 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget)\n \n \tsq = container_of(cq, struct mlx5e_txqsq, cq);\n \n-\tif (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))\n+\tif (unlikely(!MLX5E_TEST_BIT(sq->state, MLX5E_SQ_STATE_ENABLED)))\n \t\treturn false;\n \n \tcqe = mlx5_cqwq_get_cqe(&cq->wq);\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c\nindex 92db28a9ed43..7311b937e434 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c\n@@ -69,7 +69,7 @@ static void mlx5e_poll_ico_cq(struct mlx5e_cq *cq)\n \tstruct mlx5_cqe64 *cqe;\n \tu16 sqcc;\n \n-\tif (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))\n+\tif (unlikely(!MLX5E_TEST_BIT(sq->state, MLX5E_SQ_STATE_ENABLED)))\n \t\treturn;\n \n \tcqe = mlx5_cqwq_get_cqe(&cq->wq);\n@@ -129,7 +129,7 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget)\n \tfor (i = 0; i < c->num_tc; i++)\n \t\tmlx5e_cq_arm(&c->sq[i].cq);\n \n-\tif (test_bit(MLX5E_RQ_STATE_AM, &c->rq.state))\n+\tif (MLX5E_TEST_BIT(c->rq.state, MLX5E_RQ_STATE_AM))\n \t\tmlx5e_rx_am(&c->rq);\n \n \tmlx5e_cq_arm(&c->rq.cq);\n","prefixes":["net-next","09/17"]}