{"id":808810,"url":"http://patchwork.ozlabs.org/api/patches/808810/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/59A9A6260200007800176A6A@prv-mh.provo.novell.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<59A9A6260200007800176A6A@prv-mh.provo.novell.com>","list_archive_url":null,"date":"2017-09-01T16:25:42","name":"xen: use vMSI related #define-s from public interface","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"9a76e51590ba1fc8330e35dabf590d897bf66f40","submitter":{"id":9477,"url":"http://patchwork.ozlabs.org/api/people/9477/?format=json","name":"Jan Beulich","email":"JBeulich@suse.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/59A9A6260200007800176A6A@prv-mh.provo.novell.com/mbox/","series":[{"id":1072,"url":"http://patchwork.ozlabs.org/api/series/1072/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1072","date":"2017-09-01T16:25:42","name":"xen: use vMSI related #define-s from public interface","version":1,"mbox":"http://patchwork.ozlabs.org/series/1072/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/808810/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/808810/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkPvT1R1Sz9t3F\n\tfor ;\n\tSat, 2 Sep 2017 02:33:56 +1000 (AEST)","from localhost ([::1]:48635 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dnotF-0001yL-Uw\n\tfor incoming@patchwork.ozlabs.org; Fri, 01 Sep 2017 12:33:53 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:43081)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dnolR-0004Nq-Sq\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 12:25:54 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dnolO-0000vz-Og\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 12:25:49 -0400","from prv-mh.provo.novell.com ([137.65.248.74]:33405)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1dnolO-0000v2-7R\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 12:25:46 -0400","from INET-PRV-MTA by prv-mh.provo.novell.com\n\twith Novell_GroupWise; Fri, 01 Sep 2017 10:25:43 -0600"],"Message-Id":"<59A9A6260200007800176A6A@prv-mh.provo.novell.com>","X-Mailer":"Novell GroupWise Internet Agent 14.2.2 ","Date":"Fri, 01 Sep 2017 10:25:42 -0600","From":"\"Jan Beulich\" ","To":"","References":"<59A9A6260200007800176A6A@prv-mh.provo.novell.com>","Mime-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"quoted-printable","Content-Disposition":"inline","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"137.65.248.74","Subject":"[Qemu-devel] [PATCH] xen: use vMSI related #define-s from public\n\tinterface","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"xen-devel ,\n\tStefano Stabellini ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Xen and qemu having identical #define-s (with different names) is a\nstrong hint that these should have been part of the public interface\nfrom the very start. Use them if they're available, falling back to\nprivately defined values only when using older headers.\n\nSigned-off-by: Jan Beulich ","diff":"--- a/hw/xen/xen_pt_msi.c\n+++ b/hw/xen/xen_pt_msi.c\n@@ -18,6 +18,11 @@\n \n #define XEN_PT_AUTO_ASSIGN -1\n \n+#ifndef XEN_DOMCTL_VMSI_X86_DEST_ID_MASK\n+#if XEN_DOMCTL_INTERFACE_VERSION >= 0x0000000e\n+#error vMSI defines missing from domctl.h\n+#endif\n+\n /* shift count for gflags */\n #define XEN_PT_GFLAGS_SHIFT_DEST_ID 0\n #define XEN_PT_GFLAGS_SHIFT_RH 8\n@@ -26,6 +31,16 @@\n #define XEN_PT_GFLAGSSHIFT_TRG_MODE 15\n #define XEN_PT_GFLAGSSHIFT_UNMASKED 16\n \n+#define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK (0xffU << XEN_PT_GFLAGS_SHIFT_DEST_ID)\n+#define XEN_DOMCTL_VMSI_X86_RH_MASK (1U << XEN_PT_GFLAGS_SHIFT_RH)\n+#define XEN_DOMCTL_VMSI_X86_DM_MASK (1U << XEN_PT_GFLAGS_SHIFT_DM)\n+#define XEN_DOMCTL_VMSI_X86_DELIV_MASK (7U << XEN_PT_GFLAGSSHIFT_DELIV_MODE)\n+#define XEN_DOMCTL_VMSI_X86_TRIG_MASK (1U << XEN_PT_GFLAGSSHIFT_TRG_MODE)\n+#define XEN_DOMCTL_VMSI_X86_UNMASKED (1U << XEN_PT_GFLAGSSHIFT_UNMASKED)\n+#endif\n+\n+#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))\n+\n #define latch(fld) latch[PCI_MSIX_ENTRY_##fld / sizeof(uint32_t)]\n \n /*\n@@ -49,21 +64,18 @@ static inline uint32_t msi_ext_dest_id(u\n \n static uint32_t msi_gflags(uint32_t data, uint64_t addr)\n {\n- uint32_t result = 0;\n- int rh, dm, dest_id, deliv_mode, trig_mode;\n+ int rh, dm, deliv_mode, trig_mode;\n \n rh = (addr >> MSI_ADDR_REDIRECTION_SHIFT) & 0x1;\n dm = (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1;\n- dest_id = msi_dest_id(addr);\n deliv_mode = (data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x7;\n trig_mode = (data >> MSI_DATA_TRIGGER_SHIFT) & 0x1;\n \n- result = dest_id | (rh << XEN_PT_GFLAGS_SHIFT_RH)\n- | (dm << XEN_PT_GFLAGS_SHIFT_DM)\n- | (deliv_mode << XEN_PT_GFLAGSSHIFT_DELIV_MODE)\n- | (trig_mode << XEN_PT_GFLAGSSHIFT_TRG_MODE);\n-\n- return result;\n+ return MASK_INSR(msi_dest_id(addr), XEN_DOMCTL_VMSI_X86_DEST_ID_MASK) |\n+ MASK_INSR(rh, XEN_DOMCTL_VMSI_X86_RH_MASK) |\n+ MASK_INSR(dm, XEN_DOMCTL_VMSI_X86_DM_MASK) |\n+ MASK_INSR(deliv_mode, XEN_DOMCTL_VMSI_X86_DELIV_MASK) |\n+ MASK_INSR(trig_mode, XEN_DOMCTL_VMSI_X86_TRIG_MASK);\n }\n \n static inline uint64_t msi_addr64(XenPTMSI *msi)\n@@ -173,7 +185,7 @@ static int msi_msix_update(XenPCIPassthr\n table_addr = s->msix->mmio_base_addr;\n }\n \n- gflags |= masked ? 0 : (1u << XEN_PT_GFLAGSSHIFT_UNMASKED);\n+ gflags |= masked ? 0 : XEN_DOMCTL_VMSI_X86_UNMASKED;\n \n rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec,\n pirq, gflags, table_addr);\n","prefixes":[]}