{"id":808713,"url":"http://patchwork.ozlabs.org/api/patches/808713/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20170901145343.19890-3-thierry.reding@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170901145343.19890-3-thierry.reding@gmail.com>","list_archive_url":null,"date":"2017-09-01T14:53:42","name":"[3/4] clk: tegra: Use tegra_clk_register_periph_data()","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"4144f0807532aa37470dec06ff0b0e9488a69a2d","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/?format=json","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20170901145343.19890-3-thierry.reding@gmail.com/mbox/","series":[{"id":1041,"url":"http://patchwork.ozlabs.org/api/series/1041/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=1041","date":"2017-09-01T14:53:40","name":"[1/4] dt-bindings: clock: tegra: Add sor1_out clock","version":1,"mbox":"http://patchwork.ozlabs.org/series/1041/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/808713/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/808713/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"Y9zDYFS1\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkMgz0F52z9t2Z\n\tfor ;\n\tSat, 2 Sep 2017 00:53:51 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752185AbdIAOxu (ORCPT );\n\tFri, 1 Sep 2017 10:53:50 -0400","from mail-wr0-f194.google.com ([209.85.128.194]:37992 \"EHLO\n\tmail-wr0-f194.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752103AbdIAOxt (ORCPT\n\t); Fri, 1 Sep 2017 10:53:49 -0400","by mail-wr0-f194.google.com with SMTP id j3so207792wrb.5;\n\tFri, 01 Sep 2017 07:53:49 -0700 (PDT)","from localhost\n\t(p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de.\n\t[2003:e4:1bd6:d600:76d0:2bff:fe27:3f51])\n\tby smtp.gmail.com with ESMTPSA id\n\to2sm211114wmg.32.2017.09.01.07.53.47\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tFri, 01 Sep 2017 07:53:47 -0700 (PDT)"],"DKIM-Signature":"v=1; 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\n\tFri, 01 Sep 2017 07:53:48 -0700 (PDT)","From":"Thierry Reding ","To":"Michael Turquette ,\n\tStephen Boyd ","Cc":"Peter De Schrijver ,\n\tJonathan Hunter ,\n\tlinux-clk@vger.kernel.org, linux-tegra@vger.kernel.org","Subject":"[PATCH 3/4] clk: tegra: Use tegra_clk_register_periph_data()","Date":"Fri, 1 Sep 2017 16:53:42 +0200","Message-Id":"<20170901145343.19890-3-thierry.reding@gmail.com>","X-Mailer":"git-send-email 2.13.3","In-Reply-To":"<20170901145343.19890-1-thierry.reding@gmail.com>","References":"<20170901145343.19890-1-thierry.reding@gmail.com>","Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-tegra@vger.kernel.org"},"content":"From: Thierry Reding \n\nInstead of open-coding the same pattern repeatedly, reuse the newly\nintroduced tegra_clk_register_periph_data() helper that will unpack\nthe initialization structure.\n\nSigned-off-by: Thierry Reding \n---\n drivers/clk/tegra/clk-tegra-periph.c | 5 +----\n drivers/clk/tegra/clk-tegra114.c | 4 +---\n drivers/clk/tegra/clk-tegra20.c | 4 +---\n drivers/clk/tegra/clk-tegra30.c | 4 +---\n 4 files changed, 4 insertions(+), 13 deletions(-)","diff":"diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c\nindex 848255cc0209..090a5d792341 100644\n--- a/drivers/clk/tegra/clk-tegra-periph.c\n+++ b/drivers/clk/tegra/clk-tegra-periph.c\n@@ -927,10 +927,7 @@ static void __init periph_clk_init(void __iomem *clk_base,\n \t\t\tcontinue;\n \n \t\tdata->periph.gate.regs = bank;\n-\t\tclk = tegra_clk_register_periph(data->name,\n-\t\t\tdata->p.parent_names, data->num_parents,\n-\t\t\t&data->periph, clk_base, data->offset,\n-\t\t\tdata->flags);\n+\t\tclk = tegra_clk_register_periph_data(clk_base, data);\n \t\t*dt_clk = clk;\n \t}\n }\ndiff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c\nindex fd1a99c05c2d..63087d17c3e2 100644\n--- a/drivers/clk/tegra/clk-tegra114.c\n+++ b/drivers/clk/tegra/clk-tegra114.c\n@@ -1092,9 +1092,7 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base,\n \n \tfor (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {\n \t\tdata = &tegra_periph_clk_list[i];\n-\t\tclk = tegra_clk_register_periph(data->name,\n-\t\t\tdata->p.parent_names, data->num_parents,\n-\t\t\t&data->periph, clk_base, data->offset, data->flags);\n+\t\tclk = tegra_clk_register_periph_data(clk_base, data);\n \t\tclks[data->clk_id] = clk;\n \t}\n \ndiff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c\nindex 837e5cbd60e9..2b839cb24436 100644\n--- a/drivers/clk/tegra/clk-tegra20.c\n+++ b/drivers/clk/tegra/clk-tegra20.c\n@@ -850,9 +850,7 @@ static void __init tegra20_periph_clk_init(void)\n \n \tfor (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {\n \t\tdata = &tegra_periph_clk_list[i];\n-\t\tclk = tegra_clk_register_periph(data->name, data->p.parent_names,\n-\t\t\t\tdata->num_parents, &data->periph,\n-\t\t\t\tclk_base, data->offset, data->flags);\n+\t\tclk = tegra_clk_register_periph_data(clk_base, data);\n \t\tclks[data->clk_id] = clk;\n \t}\n \ndiff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c\nindex a2d163f759b4..98e8a55e4e1c 100644\n--- a/drivers/clk/tegra/clk-tegra30.c\n+++ b/drivers/clk/tegra/clk-tegra30.c\n@@ -1079,9 +1079,7 @@ static void __init tegra30_periph_clk_init(void)\n \n \tfor (i = 0; i < ARRAY_SIZE(tegra_periph_clk_list); i++) {\n \t\tdata = &tegra_periph_clk_list[i];\n-\t\tclk = tegra_clk_register_periph(data->name, data->p.parent_names,\n-\t\t\t\tdata->num_parents, &data->periph,\n-\t\t\t\tclk_base, data->offset, data->flags);\n+\t\tclk = tegra_clk_register_periph_data(clk_base, data);\n \t\tclks[data->clk_id] = clk;\n \t}\n \n","prefixes":["3/4"]}