{"id":808207,"url":"http://patchwork.ozlabs.org/api/patches/808207/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1504178062-32597-2-git-send-email-Ashish.Kumar@nxp.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504178062-32597-2-git-send-email-Ashish.Kumar@nxp.com>","list_archive_url":null,"date":"2017-08-31T11:14:22","name":"[U-Boot,v3,2/2] armv8: fsl-lsch3: Add SD boot support for ls1088aqds","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"9175f3432142569513786c88dd101557e69c45bb","submitter":{"id":68053,"url":"http://patchwork.ozlabs.org/api/people/68053/?format=json","name":"Ashish Kumar","email":"Ashish.kumar@nxp.com"},"delegate":{"id":2666,"url":"http://patchwork.ozlabs.org/api/users/2666/?format=json","username":"yorksun","first_name":"York","last_name":"Sun","email":"yorksun@freescale.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1504178062-32597-2-git-send-email-Ashish.Kumar@nxp.com/mbox/","series":[{"id":801,"url":"http://patchwork.ozlabs.org/api/series/801/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=801","date":"2017-08-31T11:14:22","name":"[U-Boot,v3,1/2] armv8: fsl-lsch3: Add SD boot support for LS1088ARDB","version":3,"mbox":"http://patchwork.ozlabs.org/series/801/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/808207/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/808207/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjfsf0Qmhz9sQl\n\tfor ;\n\tThu, 31 Aug 2017 21:14:46 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 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EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(39860400002)(39380400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(2351001)(966005)(356003)(8656003)(626005)(8676002)(189998001)(85426001)(2950100002)(6666003)(6916009)(5003940100001)(36756003)(5660300001)(8936002)(575784001)(76176999)(53936002)(50226002)(54906002)(4326008)(68736007)(86362001)(97736004)(104016004)(305945005)(106466001)(50466002)(2906002)(105606002)(47776003)(77096006)(72206003)(81166006)(498600001)(48376002)(81156014)(110136004)(50986999)(6306002);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:SN2PR03MB2271;\n\tH:tx30smr01.am.freescale.net; \n\tFPR:; SPF:Fail; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; ","X-Microsoft-Exchange-Diagnostics":["1; BN1BFFO11FD012;\n\t1:7AC8vCxfpFoGGojY1kjfhVxhwttHsKblP1Ku8FL7VBQzlHIDDMBOrZ4JMrVpDyE91enZu8GWkgggU0gebtymdqO6Zf5V0QigSIEY1ydPiNskbsfPnAqdTiXHiBeUxep0","1; SN2PR03MB2271;\n\t3:ODdbjd7ixi6lERbeHMZ5I+0JT5YWbiyhl9K9kyvoT6hkw9rh+PEG4BN1B1xfwZ+M3KM4e7PPOJqXaIYEgSVStTSEelIQa4fCKJdSQB7VjGOZpRoIkWT49lhcNAzbM80ZnzrdFiYRYXjDp1Yd7IuFz0CkUTyrqh3qq3KBVzMeKDmvarTs8xHQOJq6unub9dOwZdWaUgWGZwcQw1+OMBiFt56uHvqDx4iOzWWBA/LVneG3JmrT47r0e/CQiRU/IfnmaQ7q10vr3zL97Uvd0g2m2uLEaohypVPlizets/eh6lUD6iwHW1HIbDDMSouaxyZaR4GybNWz1LxrBiG2OOWMNad83al+812s5IFBrzrU+/4=;\n\t25:bM4Cq+YzjnzMYvD6sfXgNktgABR6fic0I3HBAgFVd/I+AyPjtEDtOU5x5zZC+Q+VWVtvmD9zIKUxNAF0gDMe5ocriMMAEkgn7zRFfjbv2e5DjYYqA4Z/lSvzR0+qYOGLrI3l1hj/omSH7PTKeu3JEPhnxevr9SdqZlOwYc1qjDD1Asb/i2L4WO1suLEbhwNVQUIx15Gu4epjiUNiiSTLW+JWc+cMptsCUrdY8WKiD08kha1uw/uBf4XQsdeYL5RipSPYZofoQ+90mO1ls1Fz+uUr7Um9mzS9aZ66Q59c9UqItyZMvyHHTRjvKsJ0evh3NyBlPMExgiK2KBIoThaIAw==","1; SN2PR03MB2271;\n\t31:DgpGS8xm7fOSIpDQ8EIximBk3nZi4Z7/zSzyqFfM9bMBi0SBHniXShJy0fZAk/d8VXSRlJiEAbPWjkAbl/Zj232v+eFxU/Tf+fyK//hr6o8PyHgtQ5tMqwPzEux4fknOZG+QZJLv6YniCqnB+OwFqVm5QlAWdcILbDFy+WJIIYw/W6vhPJee/KFfJWw7SLOX/bXUGi14Ns7PhiVBX8918SzAUnrK7FA5z2/8aXi+GpY=;\n\t4:U4HCt9X/AU6qIwspdLXzdwQcCL1D+LZ/mRtF8k3C6IyAwM8W2dcCVGQi8q6efevWH2MGlf2a7WihCZthOLY+63FPUuKLZheEQMyglRXXd69GF3ZpVI3qjIaufpXUF77HiR/hjn+XsVKfBvHiTDgXVZD1k1JsP4+vM7IoCmOL8GcSC6L3U5pzNZV4g697AHgW2xfS3djKgFon11HK8VDoxFjO2YpwaIk2qFvGHMQxJHjmalPXpwHVxbJHBPqE2W9A6Spmed8fu1sg3hJRJMu477Q//p2eUzH6zzSb5emeO1s=","=?us-ascii?Q?1; SN2PR03MB2271;\n\t23:yMd1b4XxZ1K7WUtPYypDXa1WXW/XQRJn6/0HXk4uE?=\n\tjxdYhLDpLTX4kCupXpyMVd/7/di2ji2DkI8oK3C1mUpPgCuM9znQILb5yLGMOKCsUwhhxYGEaydJBYOC46q6G+0fWzZUTzz9DaTQndQMRl0x4a3z4+bkQMWM01X4hz0sA2XAY3PLp3QkIDSHgALwSkwGswc6LMh0GxXd0pnBClq0IFx8wB29mco3Rm03LZQ2z9JGHaB4bkaluh010RhNHWwI1yva7Ij/jknsHEERKWE1XPET+DKOE63Ev0ONaFriTFvknh+hsRILyw6PPwd3E+xN9D27iBesAHLVskBGwYvliK2pJlQT7Xc/I1PDzOf6aqLwwDNFSct3hLASBqYlV6ftReIYiqQr1XYp3fmuFnRk/KyW7iLQSW3adbzMS3A8tfovqzx7IfrNHh4fkmrMM+7gI4V/lWF0nLN2BEvkJN0M+2rgEw7RmcA932ifGF2vuR5geAjFCmOJCZ2v+D96VAMODikBkKzbCT6+FYZsgecLlBtqKRoOUEgzg1HhlHENiHP2+jD8n/eXFKwiX9ZkwsNPtA8euLAl+b1uKnhukcsuNblRb2aNr9vWY8LxcgZnqAoQ1a/159M8yz8V/y4YlJ1ePSvgC4g+y0WuWqjHD+jSdZdbhilHj4kQt4MdRH/mLPXozrZ8PErj/e8eNoyij9a+3YMqYy72CM4Ya6SUOhR4gFo3GfA6Xn2xljac0lun0xYiP59DBWcKUeYRhvFNRulfuz0uhGEDrEBC1rTiLxVLp5ii37h9NoXUN/3CZvpCezynR6Tzq9g2hFPLYkm5KQhcXPzFVP9Q2ZICRCuyFY5bngkDhgfmxds75xYLcxH/zc0dk/kpQb3SotmTdLrbXjRlQR/9XQMndW8FAAYuXCmvN99oh6wUJqS5cOr+S6Uz/jUkZZ9UD4slWGQC4Fu9KkvR6Cgf+fcufpDJ3C3+YhA85NkvweAAMUKXQJ0EpU9kidwiYfcjx1IAIcOh+CMDwRgOyhpEycboKpss9h2p0O/7ZldfdXahsWF002NLzeqjQwygzSJ0Yia4EheGEeKfmxmOyXMwpnrYaw4hxHu0MPSAPy0PX2AZ05ndB9i+rWBcziecpPDyCIcYjAxyk5CuMpa7OFbMPuhLe5ryOB9ReYGMrnkYWpkI6ixkz2HMAUzD74=","1; SN2PR03MB2271;\n\t6:Q/gy4iTXPGWpug/mUSh6neIi/se/hqmWnK1JHpGuaKeoIWspWl6rpuCWH9Ra9CVslT4fzjzTQZHG2Xu3ZQ1jUdlpprQnWSkPpqD+eLEyBnElHET6i8PAhIC9NeXQgwsUCA2IUy2EUTD47xUoHD+8QYAb2L5QPZWwHCea0qS43sqYp1YpLe8P3l0/Rl/V2nVy4ygy+LREQW5WZfjzAcLtDdn+L+Uk17wujN7OIzpTjtpQ9KtHwYRKDBePGspBFSqyPm3GdMSANQx6xEz9PN2tMg34AHoWocpHXwyB4lSdntfPB/MIyotJbOCjanGvgYlhZUVF8BYaZshoQWl1dV71rQ==;\n\t5:zpasfNLDbz38Y8jhvE6wHY1jDcL0QYVCB2QhygoluphKi4eWPAx7H2ZD1E4aMm/g7bY25BfseVgTJjJ2nAxc8hrUIZu6m8JTrgBEIBWuVu/tpYItK6xDfNBdSua3OK5nRDLHwtmyDstAbptXtTvKcA==;\n\t24:Un0JW7DOzN+MHzKIUsCgSFbh4aqkZiXmiNUkB7cxTeQnSZpVbMJKKY7BXNFvY5xd+XwBeGJzWDxFfju1ZNEnC262/EG4LojGOL3VHEIqIWk=;\n\t7:zLZ7WHBzQcO2bNQGxXpuwJXUuc2ztuDXA3ahuFx/e6Z04OYldMP5gn5s/hWbY15VoeVJHGfGBxBBiN3B9ocM02ygamR4d69Od8jb/2CPZFECk0TkaslMhRTOPMeFevs4GhA8OhzkZBGmO50IrX77vLhcoMIX4NApM7RcSs0wYo2hyUqcoEZsP2JzNMSorn8AAorPIuF4Ryn2frxX5F8jMS/lTxMHxVdeQaBOqWtvtWM="],"MIME-Version":"1.0","X-MS-PublicTrafficType":"Email","X-MS-Office365-Filtering-Correlation-Id":"ed6dd44f-ed17-4242-67be-08d4f06174f3","X-Microsoft-Antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(300000502095)(300135100095)(22001)(300000503095)(300135400095)(2017052603199)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:SN2PR03MB2271; ","X-MS-TrafficTypeDiagnostic":"SN2PR03MB2271:","X-Exchange-Antispam-Report-Test":"UriScan:(185117386973197);","X-Microsoft-Antispam-PRVS":"","X-Exchange-Antispam-Report-CFA-Test":"BCL:0; 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11:14:30.9781\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SN2PR03MB2271","Cc":"Raghav Dogra ","Subject":"[U-Boot] [PATCH v3 2/2] armv8: fsl-lsch3: Add SD boot support for\n\tls1088aqds","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Add support for SD boot for QDS for ls1088 paltform\n\nSigned-off-by: Ashish Kumar \nSigned-off-by: Prabhakar Kushwaha \nSigned-off-by: Raghav Dogra \n---\nv3:\nDepends upon\nhttp://patchwork.ozlabs.org/patch/794217/\n\nRebase to top commit \"8b3cec7 mtdparts: Fix uninitialized scalar usage\"\nEnable PPA\nNew memory map\n\n arch/arm/Kconfig | 1 +\n board/freescale/ls1088a/MAINTAINERS | 1 +\n configs/ls1088aqds_sdcard_qspi_defconfig | 33 +++++++++++++++++++++++++++++++\n include/configs/ls1088aqds.h | 34 ++++++++++++++++++++++++++++----\n 4 files changed, 65 insertions(+), 4 deletions(-)\n create mode 100644 configs/ls1088aqds_sdcard_qspi_defconfig","diff":"diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\nindex 6243710..8bce296 100644\n--- a/arch/arm/Kconfig\n+++ b/arch/arm/Kconfig\n@@ -812,6 +812,7 @@ config TARGET_LS1088AQDS\n \tselect ARMV8_MULTIENTRY\n \tselect ARCH_MISC_INIT\n \tselect BOARD_LATE_INIT\n+\tselect SUPPORT_SPL\n \thelp\n \t Support for NXP LS1088AQDS platform\n \t The LS1088A Development System (QDS) is a high-performance\ndiff --git a/board/freescale/ls1088a/MAINTAINERS b/board/freescale/ls1088a/MAINTAINERS\nindex 68f23d6..b3d5c38 100644\n--- a/board/freescale/ls1088a/MAINTAINERS\n+++ b/board/freescale/ls1088a/MAINTAINERS\n@@ -14,3 +14,4 @@ S:\tMaintained\n F:\tboard/freescale/ls1088a/\n F:\tinclude/configs/ls1088aqds.h\n F:\tconfigs/ls1088aqds_qspi_defconfig\n+F:\tconfigs/ls1088aqds_sdcard_qspi_defconfig\ndiff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig\nnew file mode 100644\nindex 0000000..95d8627\n--- /dev/null\n+++ b/configs/ls1088aqds_sdcard_qspi_defconfig\n@@ -0,0 +1,33 @@\n+CONFIG_ARM=y\n+CONFIG_TARGET_LS1088AQDS=y\n+# CONFIG_SYS_MALLOC_F is not set\n+CONFIG_DM_SPI=y\n+CONFIG_DM_SPI_FLASH=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"fsl-ls1088a-qds\"\n+CONFIG_FIT=y\n+CONFIG_FIT_VERBOSE=y\n+CONFIG_OF_BOARD_SETUP=y\n+CONFIG_SYS_EXTRA_OPTIONS=\"SD_BOOT_QSPI\"\n+CONFIG_SD_BOOT=y\n+CONFIG_SPL=y\n+CONFIG_HUSH_PARSER=y\n+CONFIG_CMD_MMC=y\n+CONFIG_CMD_SF=y\n+CONFIG_CMD_I2C=y\n+# CONFIG_CMD_SETEXPR is not set\n+CONFIG_CMD_DHCP=y\n+CONFIG_CMD_PING=y\n+CONFIG_OF_CONTROL=y\n+CONFIG_NET_RANDOM_ETHADDR=y\n+CONFIG_DM=y\n+CONFIG_SPI_FLASH=y\n+CONFIG_NETDEVICES=y\n+CONFIG_E1000=y\n+CONFIG_SYS_NS16550=y\n+CONFIG_FSL_DSPI=y\n+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y\n+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0\n+CONFIG_FSL_LS_PPA=y\n+CONFIG_SPL_BUILD=y\n+CONFIG_PARTITIONS=y\n+# CONFIG_DISPLAY_BOARDINFO is not set\ndiff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h\nindex 3547b0b..72c2d3c 100644\n--- a/include/configs/ls1088aqds.h\n+++ b/include/configs/ls1088aqds.h\n@@ -24,6 +24,11 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_ENV_SIZE\t\t\t0x2000 /* 8KB */\n #define CONFIG_ENV_OFFSET\t\t0x300000 /* 3MB */\n #define CONFIG_ENV_SECT_SIZE\t\t0x40000\n+#elif defined(CONFIG_SD_BOOT)\n+#define CONFIG_ENV_OFFSET\t\t(3 * 1024 * 1024)\n+#define CONFIG_ENV_IS_IN_MMC\n+#define CONFIG_SYS_MMC_ENV_DEV\t\t0\n+#define CONFIG_ENV_SIZE\t\t\t0x2000\n #else\n #define CONFIG_ENV_IS_IN_FLASH\n #define CONFIG_ENV_ADDR\t\t\t(CONFIG_SYS_FLASH_BASE + 0x300000)\n@@ -31,10 +36,10 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_ENV_SIZE\t\t\t0x20000\n #endif\n \n-#if defined(CONFIG_QSPI_BOOT)\n+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)\n #define CONFIG_QIXIS_I2C_ACCESS\n #define SYS_NO_FLASH\n-\n+#define CONFIG_SYS_I2C_EARLY_INIT\n #undef CONFIG_CMD_IMLS\n #define CONFIG_SYS_CLK_FREQ\t\t100000000\n #define CONFIG_DDR_CLK_FREQ\t\t100000000\n@@ -192,7 +197,7 @@ unsigned long get_board_ddr_clk(void);\n \t\t\t\t\t| CSPR_V)\n \n #define CONFIG_SYS_FPGA_AMASK\t\tIFC_AMASK(64*1024)\n-#if defined(CONFIG_QSPI_BOOT)\n+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)\n #define CONFIG_SYS_FPGA_CSOR\t\tCSOR_GPCM_ADM_SHIFT(0)\n #else\n #define CONFIG_SYS_FPGA_CSOR\t\tCSOR_GPCM_ADM_SHIFT(12)\n@@ -295,7 +300,7 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS\t5\n \n /* QSPI device */\n-#if defined(CONFIG_QSPI_BOOT)\n+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)\n #define CONFIG_FSL_QSPI\n #define CONFIG_SPI_FLASH_SPANSION\n #define FSL_QSPI_FLASH_SIZE\t\t(1 << 26)\n@@ -318,7 +323,11 @@ unsigned long get_board_ddr_clk(void);\n #define CONFIG_SYS_MEMTEST_START\t0x80000000\n #define CONFIG_SYS_MEMTEST_END\t\t0x9fffffff\n \n+#ifdef CONFIG_SPL_BUILD\n+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE\n+#else\n #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE\n+#endif\n \n #define CONFIG_FSL_MEMAC\n \n@@ -346,6 +355,23 @@ unsigned long get_board_ddr_clk(void);\n \t\"sf read 0x80100000 0xE00000 0x100000;\" \\\n \t\"fsl_mc start mc 0x80000000 0x80100000\\0\"\t\\\n \t\"mcmemsize=0x70000000 \\0\"\n+#elif defined(CONFIG_SD_BOOT)\n+#undef CONFIG_EXTRA_ENV_SETTINGS\n+#define CONFIG_EXTRA_ENV_SETTINGS \\\n+\t\"hwconfig=fsl_ddr:bank_intlv=auto\\0\" \\\n+\t\"loadaddr=0x90100000\\0\" \\\n+\t\"kernel_addr=0x800\\0\" \\\n+\t\"ramdisk_addr=0x800000\\0\" \\\n+\t\"ramdisk_size=0x2000000\\0\" \\\n+\t\"fdt_high=0xa0000000\\0\" \\\n+\t\"initrd_high=0xffffffffffffffff\\0\" \\\n+\t\"kernel_start=0x8000\\0\" \\\n+\t\"kernel_load=0xa0000000\\0\" \\\n+\t\"kernel_size=0x14000\\0\" \\\n+\t\"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;\" \\\n+\t\"mmc read 0x80100000 0x7000 0x800;\" \\\n+\t\"fsl_mc start mc 0x80000000 0x80100000\\0\" \\\n+\t\"mcmemsize=0x70000000 \\0\"\n #else\t/* NOR BOOT */\n #undef CONFIG_EXTRA_ENV_SETTINGS\n #define CONFIG_EXTRA_ENV_SETTINGS\t\t\\\n","prefixes":["U-Boot","v3","2/2"]}