{"id":807014,"url":"http://patchwork.ozlabs.org/api/patches/807014/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1503999271-15712-7-git-send-email-daniel.lezcano@linaro.org/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503999271-15712-7-git-send-email-daniel.lezcano@linaro.org>","list_archive_url":null,"date":"2017-08-29T09:34:25","name":"[7/9] devicetree: bindings: Remove unused 32-bit CMT bindings","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"909be8e8df51f12ab3509f9fcd839bb6c11663b3","submitter":{"id":13265,"url":"http://patchwork.ozlabs.org/api/people/13265/?format=json","name":"Daniel Lezcano","email":"daniel.lezcano@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1503999271-15712-7-git-send-email-daniel.lezcano@linaro.org/mbox/","series":[{"id":334,"url":"http://patchwork.ozlabs.org/api/series/334/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=334","date":"2017-08-29T09:34:19","name":"[1/9] dt-bindings: timer: Add nxp tpm timer binding doc","version":1,"mbox":"http://patchwork.ozlabs.org/series/334/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/807014/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807014/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"YohQCRUx\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhNnm4jpZz9t38\n\tfor ;\n\tTue, 29 Aug 2017 19:37:00 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751318AbdH2Jgq (ORCPT\n\t);\n\tTue, 29 Aug 2017 05:36:46 -0400","from mail-wm0-f54.google.com ([74.125.82.54]:38090 \"EHLO\n\tmail-wm0-f54.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752137AbdH2JgG (ORCPT\n\t); Tue, 29 Aug 2017 05:36:06 -0400","by mail-wm0-f54.google.com with SMTP id t201so18600833wmt.1\n\tfor ;\n\tTue, 29 Aug 2017 02:36:06 -0700 (PDT)","from localhost.localdomain\n\t([2a01:e35:879a:6cd0:cc22:a7ba:e8a7:7caf])\n\tby smtp.gmail.com with ESMTPSA id\n\tr18sm3621775wrc.44.2017.08.29.02.36.04\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 29 Aug 2017 02:36:05 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=z1PUWPN1XeohBeckT3xVJz1vgjbtdzk4NZt6nOthY5w=;\n\tb=YohQCRUxTsVtmockxFkDAs3ryrR+7BixgzS+3A9/pKWKVL49D262JOAQVQxXhpqINI\n\tOiQ6JMj91m3fArYc3bQGLfoO1OFyFg/6Lo97Y7Gq6rACfiPso77GqTWbcCbYE5wDyC4o\n\tLXnbyg68vJmlXtt1EOvdowwB9oSNXh6NA2LBI=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=z1PUWPN1XeohBeckT3xVJz1vgjbtdzk4NZt6nOthY5w=;\n\tb=MQgGzRs9TA5URweplW/dK9fsB1rQxYIinzaXKcOSHqXIhB9AlQSJyNdlB8UI0RjpeJ\n\tN8zwYEux7d1yIRYWVAUjbmAv/8Uvw7i7Dz/CwEvWQHOyyiZsUV2Znoh246isUBQ+OgxK\n\tP56eGuMaPK/BKI+qMjX8PzZAwGZIzanR23DTPGsP/lZYbBHflGK6TddMDs7jFHRDpsKt\n\tH8aplprcIrqiuMDLtVSW4p89DB/Z6IqUUxRY8au3NTYjpvPEyi91334XGT0f4RNT5f6q\n\tK5p15BgqONH+WCH0XikvMD88nldqZ+vD1qanjmQLleS3PsnDl+5Yh6CYoZe6izMg1iBT\n\ttaAA==","X-Gm-Message-State":"AHYfb5ixZJMoFn2VszYHD/M3Vex+zKxquCDEvf36E+mlcKbWk3inDV3T\n\tQh9/KW3X0piAIDZi","X-Received":"by 10.28.138.84 with SMTP id m81mr844355wmd.61.1503999365697;\n\tTue, 29 Aug 2017 02:36:05 -0700 (PDT)","From":"Daniel Lezcano ","To":"tglx@linutronix.de","Cc":"linux-kernel@vger.kernel.org, Magnus Damm , \n\tRob Herring ,\n\tGeert Uytterhoeven ,\n\tRob Herring , Mark Rutland ,\n\tLaurent Pinchart ,\n\tdevicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED\n\tDEVICE TREE BINDINGS)","Subject":"[PATCH 7/9] devicetree: bindings: Remove unused 32-bit CMT bindings","Date":"Tue, 29 Aug 2017 11:34:25 +0200","Message-Id":"<1503999271-15712-7-git-send-email-daniel.lezcano@linaro.org>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org>","References":"<20170829093354.GA2572@mai>\n\t<1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"From: Magnus Damm \n\nRemove the 32-bit CMT compat strings to reduce maintenance burden.\n\nIt should be fine to break DT compatibility because the 32-bit\nCMT DT binding was never part of any upstream DTS file.\n\nSigned-off-by: Magnus Damm \nAcked-by: Rob Herring \nAcked-by: Geert Uytterhoeven \nSigned-off-by: Daniel Lezcano \n---\n Documentation/devicetree/bindings/timer/renesas,cmt.txt | 16 ----------------\n 1 file changed, 16 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt\nindex 8fb7c93..d79293a 100644\n--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt\n+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt\n@@ -12,22 +12,6 @@ datasheets.\n Required Properties:\n \n - compatible: must contain one or more of the following:\n- - \"renesas,cmt-32-r8a7740\" for the r8a7740 32-bit CMT\n-\t\t(CMT0)\n- - \"renesas,cmt-32-sh73a0\" for the sh73a0 32-bit CMT\n-\t\t(CMT0)\n- - \"renesas,cmt-32\" for all 32-bit CMT without fast clock support\n-\t\t(CMT0 on sh73a0 and r8a7740)\n-\t\tThis is a fallback for the above renesas,cmt-32-* entries.\n-\n- - \"renesas,cmt-32-fast-r8a7740\" for the r8a7740 32-bit CMT with fast\n-\t\tclock support (CMT[234])\n- - \"renesas,cmt-32-fast-sh73a0\" for the sh73A0 32-bit CMT with fast\n-\t\tclock support (CMT[234])\n- - \"renesas,cmt-32-fast\" for all 32-bit CMT with fast clock support\n-\t\t(CMT[234] on sh73a0 and r8a7740)\n-\t\tThis is a fallback for the above renesas,cmt-32-fast-* entries.\n-\n - \"renesas,cmt-48-sh73a0\" for the sh73A0 48-bit CMT\n \t\t(CMT1)\n - \"renesas,cmt-48-r8a7740\" for the r8a7740 48-bit CMT\n","prefixes":["7/9"]}