{"id":806106,"url":"http://patchwork.ozlabs.org/api/patches/806106/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1503737883-14236-4-git-send-email-yamada.masahiro@socionext.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503737883-14236-4-git-send-email-yamada.masahiro@socionext.com>","list_archive_url":null,"date":"2017-08-26T08:58:00","name":"[U-Boot,3/6] ARM: uniphier: add PLL settings for PXs3","commit_ref":"4914a68de79bc5879f4ee7f0abc5d796f88167f1","pull_url":null,"state":"accepted","archived":false,"hash":"73d2848181bed63d780fd5cf908e4eb73040a0ce","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/?format=json","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"delegate":{"id":38701,"url":"http://patchwork.ozlabs.org/api/users/38701/?format=json","username":"masahir0y","first_name":"Masahiro","last_name":"Yamada","email":"yamada.m@jp.panasonic.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1503737883-14236-4-git-send-email-yamada.masahiro@socionext.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/806106/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806106/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nifty.com header.i=@nifty.com\n\theader.b=\"Vm3fLlM3\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xfX7f4g7Dz9t3D\n\tfor ;\n\tSat, 26 Aug 2017 19:01:02 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 5B932C22094; Sat, 26 Aug 2017 09:00:01 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id E75C9C2208A;\n\tSat, 26 Aug 2017 08:58:41 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 89DA2C2206F; Sat, 26 Aug 2017 08:58:35 +0000 (UTC)","from conuserg-09.nifty.com (conuserg-09.nifty.com [210.131.2.76])\n\tby lists.denx.de (Postfix) with ESMTPS id 2167BC22072\n\tfor ; Sat, 26 Aug 2017 08:58:33 +0000 (UTC)","from grover.sesame (FL1-122-131-185-176.osk.mesh.ad.jp\n\t[122.131.185.176]) (authenticated)\n\tby conuserg-09.nifty.com with ESMTP id v7Q8wANO031195;\n\tSat, 26 Aug 2017 17:58:12 +0900"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Filter":"OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v7Q8wANO031195","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1503737892;\n\tbh=qDMTszA/zXp1b9Y23ziItA9FQB5oRNryjscBY0I7pcg=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=Vm3fLlM3NF9KyOJEFsEV3VmRD7zvKG7h84KW5qHjPDeXvBPOS9WkQJAupTVI0OLDB\n\t4eogUxzU/FLRrPPCEADvF/I1v8/32D5tupd9NmqHYwYpcaZkJut2AnCISZyZXGRcFh\n\t+BvzjqJGKgbXCx6zbwvuRu9kXNIzugNvZ5dmvaqLgivb6RrODSUKp72xB0nfIE/kfe\n\tQig0+FfRqTt5rc3//WR7RDtQhHAwGBpHQJmYMOfOd3pxMrIiWo15iDVfNW7CzDArKS\n\tONNyguAoWM5zNUMJ4X2hnnElwDg4PFmyQwQe393MXn2LRpviM4trBpz5AXOvUncqWt\n\tAGs0iO0FLO0KA==","X-Nifty-SrcIP":"[122.131.185.176]","From":"Masahiro Yamada ","To":"u-boot@lists.denx.de","Date":"Sat, 26 Aug 2017 17:58:00 +0900","Message-Id":"<1503737883-14236-4-git-send-email-yamada.masahiro@socionext.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1503737883-14236-1-git-send-email-yamada.masahiro@socionext.com>","References":"<1503737883-14236-1-git-send-email-yamada.masahiro@socionext.com>","Cc":"Albert Aribaud ","Subject":"[U-Boot] [PATCH 3/6] ARM: uniphier: add PLL settings for PXs3","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Signed-off-by: Masahiro Yamada \n---\n\n arch/arm/mach-uniphier/clk/pll-pxs3.c | 55 +++++++++++++++++++++++++++++++++++\n 1 file changed, 55 insertions(+)","diff":"diff --git a/arch/arm/mach-uniphier/clk/pll-pxs3.c b/arch/arm/mach-uniphier/clk/pll-pxs3.c\nindex 201d3517a86a..e84d52b80f3b 100644\n--- a/arch/arm/mach-uniphier/clk/pll-pxs3.c\n+++ b/arch/arm/mach-uniphier/clk/pll-pxs3.c\n@@ -1,9 +1,64 @@\n /*\n+ * Copyright (C) 2017 Socionext Inc.\n+ *\n * SPDX-License-Identifier:\tGPL-2.0+\n */\n \n+#include \n+\n #include \"../init.h\"\n+#include \"../sc64-regs.h\"\n+#include \"pll.h\"\n+\n+/* PLL type: SSC */\n+#define SC_CPLLCTRL\t(SC_BASE_ADDR | 0x1400)\t/* CPU/ARM */\n+#define SC_SPLLCTRL\t(SC_BASE_ADDR | 0x1410)\t/* misc */\n+#define SC_SPLL2CTRL\t(SC_BASE_ADDR | 0x1420)\t/* DSP */\n+#define SC_VPPLLCTRL\t(SC_BASE_ADDR | 0x1430)\t/* VPE */\n+#define SC_VGPLLCTRL\t(SC_BASE_ADDR | 0x1440)\n+#define SC_DECPLLCTRL\t(SC_BASE_ADDR | 0x1450)\n+#define SC_ENCPLLCTRL\t(SC_BASE_ADDR | 0x1460)\n+#define SC_PXFPLLCTRL\t(SC_BASE_ADDR | 0x1470)\n+#define SC_DPLL0CTRL\t(SC_BASE_ADDR | 0x1480)\t/* DDR memory 0 */\n+#define SC_DPLL1CTRL\t(SC_BASE_ADDR | 0x1490)\t/* DDR memory 1 */\n+#define SC_DPLL2CTRL\t(SC_BASE_ADDR | 0x14a0)\t/* DDR memory 2 */\n+#define SC_VSPLLCTRL\t(SC_BASE_ADDR | 0x14c0)\n+\n+/* PLL type: VPLL27 */\n+#define SC_VPLL27FCTRL\t(SC_BASE_ADDR | 0x1500)\n+#define SC_VPLL27ACTRL\t(SC_BASE_ADDR | 0x1520)\n+\n+/* PLL type: DSPLL */\n+#define SC_VPLL8KCTRL\t(SC_BASE_ADDR | 0x1540)\n \n void uniphier_pxs3_pll_init(void)\n {\n+\tuniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);\n+\t/* do nothing for SPLL */\n+\tuniphier_ld20_sscpll_init(SC_SPLL2CTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);\n+\tuniphier_ld20_sscpll_init(SC_VPPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);\n+\tuniphier_ld20_sscpll_init(SC_VGPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);\n+\tuniphier_ld20_sscpll_init(SC_DECPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);\n+\tuniphier_ld20_sscpll_init(SC_ENCPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);\n+\tuniphier_ld20_sscpll_init(SC_PXFPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);\n+\tuniphier_ld20_sscpll_init(SC_VSPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);\n+\n+\tmdelay(1);\n+\n+\tuniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_SPLL2CTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_VPPLLCTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_VGPLLCTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_DECPLLCTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_ENCPLLCTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_PXFPLLCTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_DPLL0CTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_DPLL1CTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_DPLL2CTRL);\n+\tuniphier_ld20_sscpll_ssc_en(SC_VSPLLCTRL);\n+\n+\tuniphier_ld20_vpll27_init(SC_VPLL27FCTRL);\n+\tuniphier_ld20_vpll27_init(SC_VPLL27ACTRL);\n+\n+\tuniphier_ld20_dspll_init(SC_VPLL8KCTRL);\n }\n","prefixes":["U-Boot","3/6"]}