{"id":805747,"url":"http://patchwork.ozlabs.org/api/patches/805747/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170825043036.18236-5-npiggin@gmail.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<20170825043036.18236-5-npiggin@gmail.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/20170825043036.18236-5-npiggin@gmail.com/","date":"2017-08-25T04:30:36","name":"[v3,4/4] powerpc/64s: idle ESL=0 stop can avoid MSR and save/restore overhead","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"104be51fe53c6fb7be83fc05221d9870a641869a","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/people/69518/?format=json","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170825043036.18236-5-npiggin@gmail.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/805747/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/805747/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xdpPP5vtmz9t5h\n\tfor ;\n\tFri, 25 Aug 2017 14:40:25 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xdpPP3sjLzDrKB\n\tfor ;\n\tFri, 25 Aug 2017 14:40:25 +1000 (AEST)","from mail-pg0-x241.google.com (mail-pg0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c05::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xdpBh20CvzDrK0\n\tfor ;\n\tFri, 25 Aug 2017 14:31:08 +1000 (AEST)","by mail-pg0-x241.google.com with SMTP id r133so2196140pgr.2\n\tfor ;\n\tThu, 24 Aug 2017 21:31:08 -0700 (PDT)","from roar.au.ibm.com (203-219-56-202.tpgi.com.au. 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In\nparticular NV GPRs do not have to be saved, and MSR does not have\nto be switched back to kernel MSR.\n\nSo move the test for \"lite\" sleep states out to power9_idle_stop.\n\nReviewed-by: Gautham R. Shenoy \nSigned-off-by: Nicholas Piggin \n---\n arch/powerpc/kernel/idle_book3s.S | 35 ++++++++++++++++++++++++-----------\n 1 file changed, 24 insertions(+), 11 deletions(-)","diff":"diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S\nindex 32d65ee323a0..fa56120bd0bc 100644\n--- a/arch/powerpc/kernel/idle_book3s.S\n+++ b/arch/powerpc/kernel/idle_book3s.S\n@@ -315,9 +315,6 @@ enter_winkle:\n \n \tARCH207_IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)\n \n-/*\n- * r3 - PSSCR value corresponding to the requested stop state.\n- */\n #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE\n power_enter_stop_kvm_rm:\n \t/*\n@@ -330,14 +327,11 @@ power_enter_stop_kvm_rm:\n \tli\tr4,KVM_HWTHREAD_IN_IDLE\n \t/* DO THIS IN REAL MODE! See comment above. */\n \tstb\tr4,HSTATE_HWTHREAD_STATE(r13)\n-#endif\n-power_enter_stop:\n /*\n * Check if we are executing the lite variant with ESL=EC=0\n */\n-\tandis. r4,r3,PSSCR_EC_ESL_MASK_SHIFTED\n-\tclrldi r3,r3,60 /* r3 = Bits[60:63] = Requested Level (RL) */\n-\tbne\t .Lhandle_esl_ec_set\n+\tandis.\tr4,r3,PSSCR_EC_ESL_MASK_SHIFTED\n+\tbne\tpower_enter_stop_esl\n \tPPC_STOP\n \tli\tr3,0 /* Since we didn't lose state, return 0 */\n \n@@ -354,8 +348,13 @@ power_enter_stop:\n \t */\n \tli\tr12, 0\n \tb \tpnv_wakeup_noloss\n+#endif\n \n-.Lhandle_esl_ec_set:\n+/*\n+ * r3 - PSSCR value corresponding to the requested stop state.\n+ */\n+power_enter_stop_esl:\n+\tclrldi r3,r3,60 /* r3 = Bits[60:63] = Requested Level (RL) */\n \t/*\n \t * POWER9 DD2 can incorrectly set PMAO when waking up after a\n \t * state-loss idle. Saving and restoring MMCR0 over idle is a\n@@ -428,9 +427,23 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66);\t\t\\\n * r3 contains desired PSSCR register value.\n */\n _GLOBAL(power9_idle_stop)\n-\tstd\tr3, PACA_REQ_PSSCR(r13)\n \tmtspr \tSPRN_PSSCR,r3\n-\tLOAD_REG_ADDR(r4,power_enter_stop)\n+\n+\t/*\n+\t * Check if we are executing the lite variant with ESL=EC=0\n+\t * This case resumes execution after the stop instruction without\n+\t * losing any state, so nothing has to be saved. The following\n+\t * instructions up to the blr must be skipped if we want to\n+\t * use power_enter_stop_kvm_rm.\n+\t */\n+\tandis.\tr4,r3,PSSCR_EC_ESL_MASK_SHIFTED\n+\tbne\t1f\n+\tPPC_STOP\n+\tli\tr3,0 /* Since we didn't lose state, return 0 */\n+\tblr\n+1:\t/* state-loss idle */\n+\tstd\tr3, PACA_REQ_PSSCR(r13)\n+\tLOAD_REG_ADDR(r4,power_enter_stop_esl)\n \tb\tpnv_powersave_common\n \t/* No return */\n \n","prefixes":["v3","4/4"]}