{"id":805742,"url":"http://patchwork.ozlabs.org/api/patches/805742/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170825043036.18236-3-npiggin@gmail.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<20170825043036.18236-3-npiggin@gmail.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/20170825043036.18236-3-npiggin@gmail.com/","date":"2017-08-25T04:30:34","name":"[v3,2/4] powerpc/64s: idle POWER9 can execute stop without a sync sequence","commit_ref":"56ee52408ed0bd4af400c04ad60f9811c82e5343","pull_url":null,"state":"accepted","archived":false,"hash":"4e5d44dfc77665cd4539e2c282922bf26821eb04","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/people/69518/?format=json","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170825043036.18236-3-npiggin@gmail.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/805742/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/805742/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xdpJx0b5wz9t5h\n\tfor ;\n\tFri, 25 Aug 2017 14:36:33 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xdpJw4jzGzDqR9\n\tfor ;\n\tFri, 25 Aug 2017 14:36:32 +1000 (AEST)","from mail-pg0-x243.google.com (mail-pg0-x243.google.com\n\t[IPv6:2607:f8b0:400e:c05::243])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xdpBY1cgRzDrK0\n\tfor ;\n\tFri, 25 Aug 2017 14:31:01 +1000 (AEST)","by mail-pg0-x243.google.com with SMTP id q16so2044086pgc.0\n\tfor ;\n\tThu, 24 Aug 2017 21:31:01 -0700 (PDT)","from roar.au.ibm.com (203-219-56-202.tpgi.com.au. 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Shenoy \nSigned-off-by: Nicholas Piggin \n---\n arch/powerpc/include/asm/cpuidle.h | 16 ----------------\n arch/powerpc/kernel/idle_book3s.S | 26 ++++++++++++++++++++------\n 2 files changed, 20 insertions(+), 22 deletions(-)","diff":"diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h\nindex 8a174cba5567..eb43b5c3a7b5 100644\n--- a/arch/powerpc/include/asm/cpuidle.h\n+++ b/arch/powerpc/include/asm/cpuidle.h\n@@ -101,20 +101,4 @@ static inline void report_invalid_psscr_val(u64 psscr_val, int err)\n \n #endif\n \n-/* Idle state entry routines */\n-#ifdef\tCONFIG_PPC_P7_NAP\n-#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \\\n-\t/* Magic NAP/SLEEP/WINKLE mode enter sequence */\t\\\n-\tstd\tr0,0(r1);\t\t\t\t\t\\\n-\tptesync;\t\t\t\t\t\t\\\n-\tld\tr0,0(r1);\t\t\t\t\t\\\n-236:\tcmpd\tcr0,r0,r0;\t\t\t\t\t\\\n-\tbne\t236b;\t\t\t\t\t\t\\\n-\tIDLE_INST;\t\t\t\t\t\t\\\n-\n-#define\tIDLE_STATE_ENTER_SEQ_NORET(IDLE_INST)\t\t\t\\\n-\tIDLE_STATE_ENTER_SEQ(IDLE_INST) \\\n-\tb\t.\n-#endif /* CONFIG_PPC_P7_NAP */\n-\n #endif\ndiff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S\nindex 4924647d964d..14e97f442167 100644\n--- a/arch/powerpc/kernel/idle_book3s.S\n+++ b/arch/powerpc/kernel/idle_book3s.S\n@@ -205,6 +205,19 @@ pnv_powersave_common:\n \tmtmsrd\tr7,0\n \tbctr\n \n+/*\n+ * This is the sequence required to execute idle instructions, as\n+ * specified in ISA v2.07. MSR[IR] and MSR[DR] must be 0.\n+ */\n+#define ARCH207_IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST)\t\t\\\n+\t/* Magic NAP/SLEEP/WINKLE mode enter sequence */\t\\\n+\tstd\tr0,0(r1);\t\t\t\t\t\\\n+\tptesync;\t\t\t\t\t\t\\\n+\tld\tr0,0(r1);\t\t\t\t\t\\\n+236:\tcmpd\tcr0,r0,r0;\t\t\t\t\t\\\n+\tbne\t236b;\t\t\t\t\t\t\\\n+\tIDLE_INST;\n+\n \t.globl pnv_enter_arch207_idle_mode\n pnv_enter_arch207_idle_mode:\n #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE\n@@ -230,7 +243,7 @@ pnv_enter_arch207_idle_mode:\n \tstb\tr3,PACA_THREAD_IDLE_STATE(r13)\n \tcmpwi\tcr3,r3,PNV_THREAD_SLEEP\n \tbge\tcr3,2f\n-\tIDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)\n+\tARCH207_IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)\n \t/* No return */\n 2:\n \t/* Sleep or winkle */\n@@ -269,7 +282,7 @@ pnv_fastsleep_workaround_at_entry:\n \n common_enter: /* common code for all the threads entering sleep or winkle */\n \tbgt\tcr3,enter_winkle\n-\tIDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)\n+\tARCH207_IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)\n \n fastsleep_workaround_at_entry:\n \toris\tr15,r15,PNV_CORE_IDLE_LOCK_BIT@h\n@@ -291,7 +304,7 @@ fastsleep_workaround_at_entry:\n enter_winkle:\n \tbl\tsave_sprs_to_stack\n \n-\tIDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)\n+\tARCH207_IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)\n \n /*\n * r3 - PSSCR value corresponding to the requested stop state.\n@@ -316,7 +329,7 @@ power_enter_stop:\n \tandis. r4,r3,PSSCR_EC_ESL_MASK_SHIFTED\n \tclrldi r3,r3,60 /* r3 = Bits[60:63] = Requested Level (RL) */\n \tbne\t .Lhandle_esl_ec_set\n-\tIDLE_STATE_ENTER_SEQ(PPC_STOP)\n+\tPPC_STOP\n \tli\tr3,0 /* Since we didn't lose state, return 0 */\n \n \t/*\n@@ -349,7 +362,8 @@ power_enter_stop:\n \tld\tr4,ADDROFF(pnv_first_deep_stop_state)(r5)\n \tcmpd\tr3,r4\n \tbge\t.Lhandle_deep_stop\n-\tIDLE_STATE_ENTER_SEQ_NORET(PPC_STOP)\n+\tPPC_STOP\t/* Does not return (system reset interrupt) */\n+\n .Lhandle_deep_stop:\n /*\n * Entering deep idle state.\n@@ -371,7 +385,7 @@ lwarx_loop_stop:\n \n \tbl\tsave_sprs_to_stack\n \n-\tIDLE_STATE_ENTER_SEQ_NORET(PPC_STOP)\n+\tPPC_STOP\t/* Does not return (system reset interrupt) */\n \n /*\n * Entered with MSR[EE]=0 and no soft-masked interrupts pending.\n","prefixes":["v3","2/4"]}