{"id":803630,"url":"http://patchwork.ozlabs.org/api/patches/803630/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/1503187634-3823-1-git-send-email-festevam@gmail.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503187634-3823-1-git-send-email-festevam@gmail.com>","list_archive_url":null,"date":"2017-08-20T00:07:14","name":"PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"c0115243f3494d33db5ac66e1843fd391f80bb6b","submitter":{"id":6978,"url":"http://patchwork.ozlabs.org/api/people/6978/?format=json","name":"Fabio Estevam","email":"festevam@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/1503187634-3823-1-git-send-email-festevam@gmail.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/803630/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/803630/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"VosfKsvQ\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xZcZD26S3z9t39\n\tfor ;\n\tSun, 20 Aug 2017 10:06:59 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752270AbdHTAGx (ORCPT );\n\tSat, 19 Aug 2017 20:06:53 -0400","from mail-qt0-f196.google.com ([209.85.216.196]:33496 \"EHLO\n\tmail-qt0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752241AbdHTAGw (ORCPT\n\t); Sat, 19 Aug 2017 20:06:52 -0400","by mail-qt0-f196.google.com with SMTP id 57so2414585qtu.0\n\tfor ; Sat, 19 Aug 2017 17:06:52 -0700 (PDT)","from localhost.localdomain ([201.82.170.189])\n\tby smtp.gmail.com with ESMTPSA id\n\tv142sm424196qka.74.2017.08.19.17.06.48\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tSat, 19 Aug 2017 17:06:50 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id;\n\tbh=IqUDNZho0QqF/1nScb2pTKFyE2lZmLk/sXzt0pCTCdI=;\n\tb=VosfKsvQXlhB1cXHUjiC9CaP5CEz3jPZ3f9Kd8jRhZSfRHnDNVKFWrfCbsrV7L/3iZ\n\tLW96mFUCa+ekUo3IvCqhCMGxbuh66x4GHsz3tJtvrbECSE/PvaMKMrRRiIvsD4lI7IKZ\n\tKmAwMZ8Zp+fJfw6BcfdgAt06SqAjB0u4/37bMXbPo0zoGIlwQubR+diJKWPmT6SBpmTV\n\tC5IHLitNlHn6SJTjsFWJjJX7DfKkG8BKX9ieM9YM8L/JT1DwXy6yusntYVy0Kqy41DcC\n\thfpFI9/GzG2iu60yZbQMPnve6dOZxeoLkM6Q+Gz1sSM5SO2G0we0uwbDhzXJT2Li8wJl\n\to9Yw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=IqUDNZho0QqF/1nScb2pTKFyE2lZmLk/sXzt0pCTCdI=;\n\tb=G+FFWrIGePlJxizoQUjvdjZkwtW6ba38Hl5jdZFEmZoIe7BsERxMec4gQmd5HdepAM\n\tGWJvyfTWm5msza1j4Ss2Ztk6/1LeAfLAZ6XBcMQk17RQm89vGYkZZJy5yqg2Z6KcXVPc\n\tpT1ND6U9ZyIso96/wGIsLE8VsPzdun6HEdUKIm4m7CJyLDhlVf+VpmgYXkhn3wnLKN0q\n\tllVZpdwrFcdFWdPZyPOLzFg1+sINZrI/nhsw4UnAnWMJn6Pwtc0D9h8ttP+87YevFouD\n\tqQ9GcFhFB7ke8H1BmrB48OF9GxRPTPVzMw4wELgXSaVzdsHoqLoha0Dkg8h04b8/8SXb\n\tUaVg==","X-Gm-Message-State":"AHYfb5hZEx+iQUjHmaEFzLD/a+NhrMjPshzP5+NLmizTZ4kLZA6MWDK8\n\thro2jq3NcUmhjQ==","X-Received":"by 10.200.34.201 with SMTP id g9mr17919529qta.143.1503187611505; \n\tSat, 19 Aug 2017 17:06:51 -0700 (PDT)","From":"Fabio Estevam ","To":"bhelgaas@google.com","Cc":"heiko@sntech.de, linux-pci@vger.kernel.org,\n\tFabio Estevam ","Subject":"[PATCH] PCI: rockchip: Use gpiod_set_value_cansleep() to allow\n\treset via expanders","Date":"Sat, 19 Aug 2017 21:07:14 -0300","Message-Id":"<1503187634-3823-1-git-send-email-festevam@gmail.com>","X-Mailer":"git-send-email 2.7.4","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"},"content":"The reset GPIO can be connected to a I2C or SPI IO expander, which may\nsleep, so it is safer to use the gpiod_set_value_cansleep() variant\ninstead.\n\nSigned-off-by: Fabio Estevam \n---\n drivers/pci/host/pcie-rockchip.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\nindex 2eccd53..124b280 100644\n--- a/drivers/pci/host/pcie-rockchip.c\n+++ b/drivers/pci/host/pcie-rockchip.c\n@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n \tint err, i;\n \tu32 status;\n \n-\tgpiod_set_value(rockchip->ep_gpio, 0);\n+\tgpiod_set_value_cansleep(rockchip->ep_gpio, 0);\n \n \terr = reset_control_assert(rockchip->aclk_rst);\n \tif (err) {\n@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)\n \trockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,\n \t\t\t PCIE_CLIENT_CONFIG);\n \n-\tgpiod_set_value(rockchip->ep_gpio, 1);\n+\tgpiod_set_value_cansleep(rockchip->ep_gpio, 1);\n \n \t/* 500ms timeout value should be enough for Gen1/2 training */\n \terr = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,\n","prefixes":[]}