{"id":803006,"url":"http://patchwork.ozlabs.org/api/patches/803006/?format=json","web_url":"http://patchwork.ozlabs.org/project/kvm-ppc/patch/1503022252.4493.132.camel@kernel.crashing.org/","project":{"id":23,"url":"http://patchwork.ozlabs.org/api/projects/23/?format=json","name":"KVM PowerPC development","link_name":"kvm-ppc","list_id":"kvm-ppc.vger.kernel.org","list_email":"kvm-ppc@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503022252.4493.132.camel@kernel.crashing.org>","list_archive_url":null,"date":"2017-08-18T02:10:52","name":"[1/2] kvm/xive: Workaround P9 DD1.0 bug with IPB bit loss","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"941efdd6e2443d65173093d3e7719d8ee63ed762","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/?format=json","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/kvm-ppc/patch/1503022252.4493.132.camel@kernel.crashing.org/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/803006/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/803006/checks/","tags":{},"related":[],"headers":{"Return-Path":"<kvm-ppc-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=kvm-ppc-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xYRQc4JvCz9t42\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 18 Aug 2017 12:11:20 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753858AbdHRCLT (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 17 Aug 2017 22:11:19 -0400","from gate.crashing.org ([63.228.1.57]:33064 \"EHLO\n\tgate.crashing.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1753857AbdHRCLT (ORCPT <rfc822;kvm-ppc@vger.kernel.org>);\n\tThu, 17 Aug 2017 22:11:19 -0400","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v7I2Aqt1004389;\n\tThu, 17 Aug 2017 21:10:53 -0500"],"Message-ID":"<1503022252.4493.132.camel@kernel.crashing.org>","Subject":"[PATCH 1/2] kvm/xive: Workaround P9 DD1.0 bug with IPB bit loss","From":"Benjamin Herrenschmidt <benh@kernel.crashing.org>","To":"kvm-ppc@vger.kernel.org","Cc":"linuxppc dev list <linuxppc-dev@lists.ozlabs.org>,\n\t\"kvm@vger.kernel.org\" <kvm@vger.kernel.org>, paulus@samba.org","Date":"Fri, 18 Aug 2017 12:10:52 +1000","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.4 (3.24.4-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"7bit","Sender":"kvm-ppc-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<kvm-ppc.vger.kernel.org>","X-Mailing-List":"kvm-ppc@vger.kernel.org"},"content":"Thankfully it only happens when manually manipulating CPPR which\nis rather quite rare.\n\nSigned-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>\n---\n arch/powerpc/kvm/book3s_xive_template.c | 11 ++++++++++-\n 1 file changed, 10 insertions(+), 1 deletion(-)\n\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe kvm-ppc\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","diff":"diff --git a/arch/powerpc/kvm/book3s_xive_template.c b/arch/powerpc/kvm/book3s_xive_template.c\nindex 4636ca6e7d38..150be86b1018 100644\n--- a/arch/powerpc/kvm/book3s_xive_template.c\n+++ b/arch/powerpc/kvm/book3s_xive_template.c\n@@ -16,7 +16,16 @@ static void GLUE(X_PFX,ack_pending)(struct kvmppc_xive_vcpu *xc)\n \tu8 cppr;\n \tu16 ack;\n \n-\t/* XXX DD1 bug workaround: Check PIPR vs. CPPR first ! */\n+\t/*\n+\t * DD1 bug workaround: If PIPR is less favored than CPPR\n+\t * ignore the interrupt or we might incorrectly lose an IPB\n+\t * bit.\n+\t */\n+\tif (cpu_has_feature(CPU_FTR_POWER9_DD1)) {\n+\t\tu8 pipr = __x_readb(__x_tima + TM_QW1_OS + TM_PIPR);\n+\t\tif (pipr >= xc->hw_cppr)\n+\t\t\treturn;\n+\t}\n \n \t/* Perform the acknowledge OS to register cycle. */\n \tack = be16_to_cpu(__x_readw(__x_tima + TM_SPC_ACK_OS_REG));\n","prefixes":["1/2"]}