{"id":802405,"url":"http://patchwork.ozlabs.org/api/patches/802405/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1502955089-2049-8-git-send-email-ran.wang_1@nxp.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1502955089-2049-8-git-send-email-ran.wang_1@nxp.com>","list_archive_url":null,"date":"2017-08-17T07:31:29","name":"[U-Boot,v3,8/8] armv7: Add workaround for USB erratum A-009007","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"2b75a902a62a59fa196de7683971b30a0ea057fc","submitter":{"id":71939,"url":"http://patchwork.ozlabs.org/api/people/71939/?format=json","name":"Ran Wang","email":"ran.wang_1@nxp.com"},"delegate":{"id":2666,"url":"http://patchwork.ozlabs.org/api/users/2666/?format=json","username":"yorksun","first_name":"York","last_name":"Sun","email":"yorksun@freescale.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1502955089-2049-8-git-send-email-ran.wang_1@nxp.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/802405/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/802405/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:MWHPR03MB3326; ","X-Forefront-PRVS":"0402872DA1","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Aug 2017 07:48:54.4915\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"MWHPR03MB3326","Cc":"Priyanka Jain , ran.wang_1@nxp.com","Subject":"[U-Boot] [PATCH v3 8/8] armv7: Add workaround for USB erratum\n\tA-009007","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Rx Compliance tests may fail intermittently at high\njitter frequencies using default register values\n\nChanges identified in test setup makes the Rx compliance test pass\n\nSigned-off-by: Sriram Dash \nSigned-off-by: Rajesh Bhagat \nSigned-off-by: Suresh Gupta \nSigned-off-by: Ran Wang \n---\nChange in v3:\n- none\n\nChange in v2:\n\tIn function erratum_a009007():\n\t1.Put a blank line after variable declaration.\n\n arch/arm/cpu/armv7/ls102xa/Kconfig | 6 ++++++\n arch/arm/cpu/armv7/ls102xa/soc.c | 12 ++++++++++++\n arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 7 +++++++\n 3 files changed, 25 insertions(+)","diff":"diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig\nindex 0acff07..f45bb1d 100644\n--- a/arch/arm/cpu/armv7/ls102xa/Kconfig\n+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig\n@@ -8,6 +8,7 @@ config ARCH_LS1021A\n \tselect SYS_FSL_ERRATUM_A009008\n \tselect SYS_FSL_ERRATUM_A009798\n \tselect SYS_FSL_ERRATUM_A008997\n+\tselect SYS_FSL_ERRATUM_A009007\n \tselect SYS_FSL_SRDS_1\n \tselect SYS_HAS_SERDES\n \tselect SYS_FSL_DDR_BE if SYS_FSL_DDR\n@@ -69,6 +70,11 @@ config SYS_FSL_ERRATUM_A008997\n \thelp\n \t\tWorkaround for USB PHY erratum A008997\n \n+config SYS_FSL_ERRATUM_A009007\n+\tbool\n+\thelp\n+\t\tWorkaround for USB PHY erratum A009007\n+\n config SYS_FSL_SRDS_1\n \tbool\n \ndiff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c\nindex 6f8eb0b..9e78344 100644\n--- a/arch/arm/cpu/armv7/ls102xa/soc.c\n+++ b/arch/arm/cpu/armv7/ls102xa/soc.c\n@@ -93,6 +93,17 @@ static void erratum_a008997(void)\n #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */\n }\n \n+static void erratum_a009007(void)\n+{\n+#ifdef CONFIG_SYS_FSL_ERRATUM_A009007\n+\tvoid __iomem *usb_phy = (void __iomem *)USB_PHY_BASE;\n+\n+\tout_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1);\n+\tout_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_2);\n+\tout_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3);\n+\tout_le16(usb_phy + USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4);\n+#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */\n+}\n \n void s_init(void)\n {\n@@ -184,6 +195,7 @@ int arch_soc_init(void)\n \terratum_a009008();\n \terratum_a009798();\n \terratum_a008997();\n+\terratum_a009007();\n \n \treturn 0;\n }\ndiff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\nindex 539c1cf..703e59f 100644\n--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n@@ -181,6 +181,13 @@ struct ccsr_gur {\n #define USB_PCSTXSWINGFULL_MASK\t0x0000FE00\n #define USB_PCSTXSWINGFULL_VAL\t0x00008E00\n \n+#define USB_PHY_BASE\t\t\t0x08510000\n+#define USB_PHY_RX_OVRD_IN_HI\t0x200c\n+#define USB_PHY_RX_EQ_VAL_1\t\t0x0000\n+#define USB_PHY_RX_EQ_VAL_2\t\t0x8000\n+#define USB_PHY_RX_EQ_VAL_3\t\t0x8004\n+#define USB_PHY_RX_EQ_VAL_4\t\t0x800C\n+\n /* Supplemental Configuration Unit */\n struct ccsr_scfg {\n \tu32 dpslpcr;\n","prefixes":["U-Boot","v3","8/8"]}