{"id":798473,"url":"http://patchwork.ozlabs.org/api/patches/798473/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1502075236-24078-4-git-send-email-qiang.zhao@nxp.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<1502075236-24078-4-git-send-email-qiang.zhao@nxp.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/1502075236-24078-4-git-send-email-qiang.zhao@nxp.com/","date":"2017-08-07T03:07:15","name":"[v10,3/4] irqchip/qeic: merge qeic_of_init into qe_ic_init","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"c185e285a0f63a4d3dd3c7863c6e2445ce39b42f","submitter":{"id":68014,"url":"http://patchwork.ozlabs.org/api/people/68014/?format=json","name":"Qiang Zhao","email":"qiang.zhao@nxp.com"},"delegate":{"id":1707,"url":"http://patchwork.ozlabs.org/api/users/1707/?format=json","username":"scottwood","first_name":"Scott","last_name":"Wood","email":"scottwood@freescale.com"},"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1502075236-24078-4-git-send-email-qiang.zhao@nxp.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/798473/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/798473/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xQjh92GRFz9s7g\n\tfor ;\n\tMon, 7 Aug 2017 13:29:45 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xQjh90TtPzDqmP\n\tfor ;\n\tMon, 7 Aug 2017 13:29:45 +1000 (AEST)","from NAM01-SN1-obe.outbound.protection.outlook.com\n\t(mail-sn1nam01on0603.outbound.protection.outlook.com\n\t[IPv6:2a01:111:f400:fe40::603])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xQjZ34D25zDqp4\n\tfor ;\n\tMon, 7 Aug 2017 13:24:27 +1000 (AEST)","from MWHPR03CA0050.namprd03.prod.outlook.com (2603:10b6:301:3b::39)\n\tby DM2PR0301MB0909.namprd03.prod.outlook.com\n\t(2a01:111:e400:501c::14) with Microsoft SMTP Server (version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1320.16;\n\tMon, 7 Aug 2017 03:24:21 +0000","from BN1BFFO11FD001.protection.gbl (2a01:111:f400:7c10::1:125) by\n\tMWHPR03CA0050.outlook.office365.com (2603:10b6:301:3b::39) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.1320.16\n\tvia Frontend Transport; Mon, 7 Aug 2017 03:24:21 +0000","from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBN1BFFO11FD001.mail.protection.outlook.com (10.58.144.64) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1304.16\n\tvia Frontend Transport; Mon, 7 Aug 2017 03:24:20 +0000","from titan.ap.freescale.net ([10.192.208.233])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv773NpO7014527; Sun, 6 Aug 2017 20:24:18 -0700"],"Authentication-Results":"spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;","Received-SPF":"Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;","From":"Zhao Qiang ","To":"","Subject":"[PATCH v10 3/4] irqchip/qeic: merge qeic_of_init into qe_ic_init","Date":"Mon, 7 Aug 2017 11:07:15 +0800","Message-ID":"<1502075236-24078-4-git-send-email-qiang.zhao@nxp.com>","X-Mailer":"git-send-email 2.1.0.27.g96db324","In-Reply-To":"<1502075236-24078-1-git-send-email-qiang.zhao@nxp.com>","References":"<1502075236-24078-1-git-send-email-qiang.zhao@nxp.com>","X-EOPAttributedMessage":"0","X-Matching-Connectors":"131465498607083129;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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DM2PR0301MB0909;\n\t6:2GiNipfcDyIB3PcTzZGfcTw1T76o4mCY9PALUWP6S7yRFm16WJEdzoCOISRVJSga3UkavWPRrDLA8DiLUoQpuxTPzcCGzP5xRrhlf7ZSednJC1Ck71esbGa765CFJ5MPTnNBEqAeXEFtldMeEMkUZFAVWQusSuDGd1lmua3Txu7EqiAGenmMmQ9Jzyaq3UshYtuQynEoY9zbuBPecVTXfPs4H7h9BzokytNS5bTXcbB1pX451BDosDFWd6KZcYmsS5g2HNaAeIUpiljEk3OgQXARUUfzv3CY84IoXGxRSQf+UvVeJfuh03K2oQSVK7gQaXOEVF28g9fCrB0nCnfkjA==;\n\t24:bKTmko3RhGfgeWzQYiQcRZGguogAH10HAvGv1Mj2fO6YedpeGT+tyhQXWskPOCoUTmCQg97qGGmEinax8GJvSgNonm0lWXDHKu+zC1/9B0s=;\n\t7:Xn1AGJuGDEdDAsrV/tVaewTV5o0Pl2VKyIrC9eoju8tD/kEj1Y+F3O6w0+TnUI8K8DPFlysyyZ3YEmu9WWfN5JpOByYMQkOBItskntlYw4GwERqJjo8Ms/Eecmn8kgdFdo3EkRnk6eEIwhdpj4Tu/jCqwJoQ0FNgwCHgSFq/ul5iq+PHmG6SksQsZLJkJvlbLw6Vd+GDl8NNnpmVWgYQnlxAwqq5Sf56FP7bzi/AJBQ="],"MIME-Version":"1.0","Content-Type":"text/plain","X-MS-PublicTrafficType":"Email","X-MS-Office365-Filtering-Correlation-Id":"87df90b6-679d-46eb-7d18-08d4dd43cb26","X-Microsoft-Antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(300000503095)(300135400095)(2017052603031)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:DM2PR0301MB0909; ","X-MS-TrafficTypeDiagnostic":"DM2PR0301MB0909:","X-Forefront-PRVS":"0392679D18","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"07 Aug 2017 03:24:20.5211\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DM2PR0301MB0909","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"oss@buserror.net, Zhao Qiang ,\n\tlinuxppc-dev@lists.ozlabs.org, xiaobo.xie@nxp.com,\n\tlinux-kernel@vger.kernel.org","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,\npass the device_node to qe_ic_init.\nSo merge qeic_of_init into qe_ic_init to get the qeic node in\nqe_ic_init.\n\nSigned-off-by: Zhao Qiang \n---\n drivers/irqchip/irq-qeic.c | 90 ++++++++++++++++++++--------------------------\n include/soc/fsl/qe/qe_ic.h | 7 ----\n 2 files changed, 39 insertions(+), 58 deletions(-)","diff":"diff --git a/drivers/irqchip/irq-qeic.c b/drivers/irqchip/irq-qeic.c\nindex 8287c22..a2d8084 100644\n--- a/drivers/irqchip/irq-qeic.c\n+++ b/drivers/irqchip/irq-qeic.c\n@@ -407,27 +407,33 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)\n \treturn irq_linear_revmap(qe_ic->irqhost, irq);\n }\n \n-void __init qe_ic_init(struct device_node *node, unsigned int flags,\n-\t\t void (*low_handler)(struct irq_desc *desc),\n-\t\t void (*high_handler)(struct irq_desc *desc))\n+static int __init qe_ic_init(struct device_node *node, unsigned int flags)\n {\n \tstruct qe_ic *qe_ic;\n \tstruct resource res;\n-\tu32 temp = 0, ret, high_active = 0;\n+\tu32 temp = 0, high_active = 0;\n+\tint ret = 0;\n+\n+\tif (!node)\n+\t\treturn -ENODEV;\n \n \tret = of_address_to_resource(node, 0, &res);\n-\tif (ret)\n-\t\treturn;\n+\tif (ret) {\n+\t\tret = -ENODEV;\n+\t\tgoto err_put_node;\n+\t}\n \n \tqe_ic = kzalloc(sizeof(*qe_ic), GFP_KERNEL);\n-\tif (qe_ic == NULL)\n-\t\treturn;\n+\tif (qe_ic == NULL) {\n+\t\tret = -ENOMEM;\n+\t\tgoto err_put_node;\n+\t}\n \n \tqe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,\n \t\t\t\t\t &qe_ic_host_ops, qe_ic);\n \tif (qe_ic->irqhost == NULL) {\n-\t\tkfree(qe_ic);\n-\t\treturn;\n+\t\tret = -ENOMEM;\n+\t\tgoto err_free_qe_ic;\n \t}\n \n \tqe_ic->regs = ioremap(res.start, resource_size(&res));\n@@ -438,9 +444,9 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,\n \tqe_ic->virq_low = irq_of_parse_and_map(node, 1);\n \n \tif (qe_ic->virq_low == NO_IRQ) {\n-\t\tprintk(KERN_ERR \"Failed to map QE_IC low IRQ\\n\");\n-\t\tkfree(qe_ic);\n-\t\treturn;\n+\t\tpr_err(\"Failed to map QE_IC low IRQ\\n\");\n+\t\tret = -ENOMEM;\n+\t\tgoto err_domain_remove;\n \t}\n \n \t/* default priority scheme is grouped. If spread mode is */\n@@ -467,13 +473,24 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,\n \tqe_ic_write(qe_ic->regs, QEIC_CICR, temp);\n \n \tirq_set_handler_data(qe_ic->virq_low, qe_ic);\n-\tirq_set_chained_handler(qe_ic->virq_low, low_handler);\n+\tirq_set_chained_handler(qe_ic->virq_low, qe_ic_cascade_low_mpic);\n \n \tif (qe_ic->virq_high != NO_IRQ &&\n \t\t\tqe_ic->virq_high != qe_ic->virq_low) {\n \t\tirq_set_handler_data(qe_ic->virq_high, qe_ic);\n-\t\tirq_set_chained_handler(qe_ic->virq_high, high_handler);\n+\t\tirq_set_chained_handler(qe_ic->virq_high,\n+\t\t\t\t\tqe_ic_cascade_high_mpic);\n \t}\n+\tof_node_put(node);\n+\treturn 0;\n+\n+err_domain_remove:\n+\tirq_domain_remove(qe_ic->irqhost);\n+err_free_qe_ic:\n+\tkfree(qe_ic);\n+err_put_node:\n+\tof_node_put(node);\n+\treturn ret;\n }\n \n void qe_ic_set_highest_priority(unsigned int virq, int high)\n@@ -570,45 +587,16 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high)\n \treturn 0;\n }\n \n-static struct bus_type qe_ic_subsys = {\n-\t.name = \"qe_ic\",\n-\t.dev_name = \"qe_ic\",\n-};\n-\n-static struct device device_qe_ic = {\n-\t.id = 0,\n-\t.bus = &qe_ic_subsys,\n-};\n-\n-static int __init init_qe_ic_sysfs(void)\n+static int __init init_qe_ic(struct device_node *node,\n+\t\t\t struct device_node *parent)\n {\n-\tint rc;\n-\n-\tprintk(KERN_DEBUG \"Registering qe_ic with sysfs...\\n\");\n+\tint ret;\n \n-\trc = subsys_system_register(&qe_ic_subsys, NULL);\n-\tif (rc) {\n-\t\tprintk(KERN_ERR \"Failed registering qe_ic sys class\\n\");\n-\t\treturn -ENODEV;\n-\t}\n-\trc = device_register(&device_qe_ic);\n-\tif (rc) {\n-\t\tprintk(KERN_ERR \"Failed registering qe_ic sys device\\n\");\n-\t\treturn -ENODEV;\n-\t}\n-\treturn 0;\n-}\n+\tret = qe_ic_init(node, 0);\n+\tif (ret)\n+\t\treturn ret;\n \n-static int __init qeic_of_init(struct device_node *node,\n-\t\t\t struct device_node *parent)\n-{\n-\tif (!node)\n-\t\treturn -ENODEV;\n-\tqe_ic_init(node, 0, qe_ic_cascade_low_mpic,\n-\t\t qe_ic_cascade_high_mpic);\n-\tof_node_put(node);\n \treturn 0;\n }\n \n-IRQCHIP_DECLARE(qeic, \"fsl,qe-ic\", qeic_of_init);\n-subsys_initcall(init_qe_ic_sysfs);\n+IRQCHIP_DECLARE(qeic, \"fsl,qe-ic\", init_qe_ic);\ndiff --git a/include/soc/fsl/qe/qe_ic.h b/include/soc/fsl/qe/qe_ic.h\nindex 1e155ca..6113699 100644\n--- a/include/soc/fsl/qe/qe_ic.h\n+++ b/include/soc/fsl/qe/qe_ic.h\n@@ -58,16 +58,9 @@ enum qe_ic_grp_id {\n };\n \n #ifdef CONFIG_QUICC_ENGINE\n-void qe_ic_init(struct device_node *node, unsigned int flags,\n-\t\tvoid (*low_handler)(struct irq_desc *desc),\n-\t\tvoid (*high_handler)(struct irq_desc *desc));\n unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);\n unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);\n #else\n-static inline void qe_ic_init(struct device_node *node, unsigned int flags,\n-\t\tvoid (*low_handler)(struct irq_desc *desc),\n-\t\tvoid (*high_handler)(struct irq_desc *desc))\n-{}\n static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)\n { return 0; }\n static inline unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)\n","prefixes":["v10","3/4"]}