{"id":711679,"url":"http://patchwork.ozlabs.org/api/patches/711679/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170106045654.21193-3-wenyou.yang@atmel.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170106045654.21193-3-wenyou.yang@atmel.com>","list_archive_url":null,"date":"2017-01-06T04:56:51","name":"[U-Boot,2/4] ARM: at91: sama5: remove hardware.h included in board config","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"339fb3f47db659773ecd4678e73a91c764655844","submitter":{"id":16102,"url":"http://patchwork.ozlabs.org/api/people/16102/?format=json","name":"Wenyou Yang","email":"wenyou.yang@atmel.com"},"delegate":{"id":6342,"url":"http://patchwork.ozlabs.org/api/users/6342/?format=json","username":"abiessmann","first_name":"Andreas","last_name":"Bießmann","email":"andreas.biessmann@googlemail.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170106045654.21193-3-wenyou.yang@atmel.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/711679/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/711679/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Received":["from theia.denx.de (theia.denx.de [85.214.87.163])\n\tby ozlabs.org (Postfix) with ESMTP id 3tvsnG3Bg2z9sdn\n\tfor ;\n\tFri, 6 Jan 2017 16:00:34 +1100 (AEDT)","from localhost (localhost [127.0.0.1])\n\tby theia.denx.de (Postfix) with ESMTP id 79612B393B;\n\tFri, 6 Jan 2017 06:00:27 +0100 (CET)","from theia.denx.de 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by\n\tapsmtp01.corp.atmel.com (10.168.254.30) with Microsoft SMTP Server id\n\t14.3.235.1; Fri, 6 Jan 2017 13:03:08 +0800"],"X-policyd-weight":"NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5\n\tNOT_IN_BL_NJABL=-1.5 (only DNSBL check requested)","From":"Wenyou Yang ","To":"U-Boot Mailing List ","Date":"Fri, 6 Jan 2017 12:56:51 +0800","Message-ID":"<20170106045654.21193-3-wenyou.yang@atmel.com>","X-Mailer":"git-send-email 2.11.0","In-Reply-To":"<20170106045654.21193-1-wenyou.yang@atmel.com>","References":"<20170106045654.21193-1-wenyou.yang@atmel.com>","MIME-Version":"1.0","Subject":"[U-Boot] [PATCH 2/4] ARM: at91: sama5: remove hardware.h included\n\tin board config","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.15","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"As said in READRE.kconfig, include/configs/*.h will be removed\nafter all options are switched to Kconfig.\nAs the first step, remove the follow line from\ninclude/configs/at91-sama5_common.h.\n\n #include \n\nSigned-off-by: Wenyou Yang \n---\n\n arch/arm/mach-at91/atmel_sfr.c | 1 +\n arch/arm/mach-at91/matrix.c | 1 +\n drivers/pinctrl/pinctrl-at91.c | 1 +\n include/configs/at91-sama5_common.h | 2 --\n include/configs/ma5d4evk.h | 9 ++++++---\n include/configs/sama5d2_ptc.h | 11 +++++++----\n include/configs/sama5d2_xplained.h | 5 ++++-\n include/configs/sama5d3_xplained.h | 13 ++++++++-----\n include/configs/sama5d3xek.h | 11 +++++++----\n include/configs/sama5d4_xplained.h | 7 +++++--\n include/configs/sama5d4ek.h | 7 +++++--\n include/configs/vinco.h | 11 +++++++----\n 12 files changed, 52 insertions(+), 27 deletions(-)","diff":"diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c\nindex adf44c6a94..d595ba8836 100644\n--- a/arch/arm/mach-at91/atmel_sfr.c\n+++ b/arch/arm/mach-at91/atmel_sfr.c\n@@ -6,6 +6,7 @@\n */\n \n #include \n+#include \n #include \n #include \n \ndiff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c\nindex 57d72700d3..08659c87d4 100644\n--- a/arch/arm/mach-at91/matrix.c\n+++ b/arch/arm/mach-at91/matrix.c\n@@ -6,6 +6,7 @@\n */\n \n #include \n+#include \n #include \n #include \n \ndiff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c\nindex 904e1bdc68..4879edf528 100644\n--- a/drivers/pinctrl/pinctrl-at91.c\n+++ b/drivers/pinctrl/pinctrl-at91.c\n@@ -8,6 +8,7 @@\n */\n \n #include \n+#include \n #include \n #include \n #include \ndiff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h\nindex e7ecc3f2ca..36bf0bba2a 100644\n--- a/include/configs/at91-sama5_common.h\n+++ b/include/configs/at91-sama5_common.h\n@@ -10,8 +10,6 @@\n #ifndef __AT91_SAMA5_COMMON_H\n #define __AT91_SAMA5_COMMON_H\n \n-#include \n-\n #define CONFIG_SYS_TEXT_BASE\t\t0x26f00000\n \n /* ARM asynchronous clock */\ndiff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h\nindex 91037d6cb5..4b72f9570f 100644\n--- a/include/configs/ma5d4evk.h\n+++ b/include/configs/ma5d4evk.h\n@@ -22,11 +22,14 @@\n #define CONFIG_DOS_PARTITION\n #define CONFIG_FAT_WRITE\n \n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xfc06863c\n+\n /*\n * Memory configurations\n */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE\t\t0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x10000000\n \n #ifdef CONFIG_SPL_BUILD\n@@ -55,8 +58,8 @@\n * Serial Driver\n */\n #define CONFIG_ATMEL_USART\n-#define CONFIG_USART_BASE\t\tATMEL_BASE_USART0\n-#define CONFIG_USART_ID\t\t\tATMEL_ID_USART0\n+#define CONFIG_USART_BASE\t\t0xf802c000\n+#define CONFIG_USART_ID\t\t\t6\n \n /*\n * Ethernet\ndiff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h\nindex 7a049d4580..74badff97d 100644\n--- a/include/configs/sama5d2_ptc.h\n+++ b/include/configs/sama5d2_ptc.h\n@@ -17,10 +17,13 @@\n \n /* serial console */\n #define CONFIG_ATMEL_USART\n-#define CONFIG_USART_BASE\t\tATMEL_BASE_UART0\n-#define CONFIG_USART_ID\t\t\tATMEL_ID_UART0\n+#define CONFIG_USART_BASE\t\t0xf801c000\n+#define CONFIG_USART_ID\t\t\t24\n \n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xf804803c\n+\n+#define CONFIG_SYS_SDRAM_BASE\t\t0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x20000000\n \n #ifdef CONFIG_SPL_BUILD\n@@ -53,7 +56,7 @@\n #ifdef CONFIG_CMD_NAND\n #define CONFIG_NAND_ATMEL\n #define CONFIG_SYS_MAX_NAND_DEVICE\t1\n-#define CONFIG_SYS_NAND_BASE\t\tATMEL_BASE_CS3\n+#define CONFIG_SYS_NAND_BASE\t\t0x80000000\n /* our ALE is AD21 */\n #define CONFIG_SYS_NAND_MASK_ALE\t(1 << 21)\n /* our CLE is AD22 */\ndiff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h\nindex 61e337617c..39d686ffee 100644\n--- a/include/configs/sama5d2_xplained.h\n+++ b/include/configs/sama5d2_xplained.h\n@@ -19,9 +19,12 @@\n \n #define CONFIG_MISC_INIT_R\n \n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xf804803c\n+\n /* SDRAM */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE 0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x20000000\n \n #ifdef CONFIG_SPL_BUILD\ndiff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h\nindex 39c8883bad..eae60216bd 100644\n--- a/include/configs/sama5d3_xplained.h\n+++ b/include/configs/sama5d3_xplained.h\n@@ -18,16 +18,19 @@\n * This needs to be defined for the OHCI code to work but it is defined as\n * ATMEL_ID_UHPHS in the CPU specific header files.\n */\n-#define ATMEL_ID_UHP\t\t\tATMEL_ID_UHPHS\n+#define ATMEL_ID_UHP\t\t\t32\n \n /*\n * Specify the clock enable bit in the PMC_SCER register.\n */\n-#define ATMEL_PMC_UHP\t\t\tAT91SAM926x_PMC_UHP\n+#define ATMEL_PMC_UHP\t\t\t(1 << 6)\n+\n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xfffffe3c\n \n /* SDRAM */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE 0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x10000000\n \n #ifdef CONFIG_SPL_BUILD\n@@ -43,7 +46,7 @@\n #ifdef CONFIG_CMD_NAND\n #define CONFIG_NAND_ATMEL\n #define CONFIG_SYS_MAX_NAND_DEVICE\t1\n-#define CONFIG_SYS_NAND_BASE\t\tATMEL_BASE_CS3\n+#define CONFIG_SYS_NAND_BASE\t\t0x60000000\n /* our ALE is AD21 */\n #define CONFIG_SYS_NAND_MASK_ALE\t(1 << 21)\n /* our CLE is AD22 */\n@@ -86,7 +89,7 @@\n #define CONFIG_USB_ATMEL_CLK_SEL_UPLL\n #define CONFIG_USB_OHCI_NEW\n #define CONFIG_SYS_USB_OHCI_CPU_INIT\n-#define CONFIG_SYS_USB_OHCI_REGS_BASE\t\tATMEL_BASE_OHCI\n+#define CONFIG_SYS_USB_OHCI_REGS_BASE\t\t0x00600000\n #define CONFIG_SYS_USB_OHCI_SLOT_NAME\t\t\"SAMA5D3 Xplained\"\n #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS\t2\n #define CONFIG_DOS_PARTITION\ndiff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h\nindex 89cdd1bb13..31be9e8a31 100644\n--- a/include/configs/sama5d3xek.h\n+++ b/include/configs/sama5d3xek.h\n@@ -27,12 +27,12 @@\n * This needs to be defined for the OHCI code to work but it is defined as\n * ATMEL_ID_UHPHS in the CPU specific header files.\n */\n-#define ATMEL_ID_UHP\t\t\tATMEL_ID_UHPHS\n+#define ATMEL_ID_UHP\t\t\t32\n \n /*\n * Specify the clock enable bit in the PMC_SCER register.\n */\n-#define ATMEL_PMC_UHP\t\t\tAT91SAM926x_PMC_UHP\n+#define ATMEL_PMC_UHP\t\t\t(1 << 6)\n \n /* LCD */\n #define LCD_BPP\t\t\t\tLCD_COLOR16\n@@ -57,9 +57,12 @@\n #define CONFIG_SYS_MAX_FLASH_BANKS\t1\n #endif\n \n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xfffffe3c\n+\n /* SDRAM */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE 0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x20000000\n \n #ifdef CONFIG_SPL_BUILD\n@@ -75,7 +78,7 @@\n #ifdef CONFIG_CMD_NAND\n #define CONFIG_NAND_ATMEL\n #define CONFIG_SYS_MAX_NAND_DEVICE\t1\n-#define CONFIG_SYS_NAND_BASE\t\tATMEL_BASE_CS3\n+#define CONFIG_SYS_NAND_BASE\t\t0x60000000\n /* our ALE is AD21 */\n #define CONFIG_SYS_NAND_MASK_ALE\t(1 << 21)\n /* our CLE is AD22 */\ndiff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h\nindex 962eaf8db0..2e6d7a662d 100644\n--- a/include/configs/sama5d4_xplained.h\n+++ b/include/configs/sama5d4_xplained.h\n@@ -14,9 +14,12 @@\n \n #define CONFIG_BOARD_EARLY_INIT_F\n \n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xfc06863c\n+\n /* SDRAM */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE 0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x20000000\n \n #ifdef CONFIG_SPL_BUILD\n@@ -34,7 +37,7 @@\n #ifdef CONFIG_CMD_NAND\n #define CONFIG_NAND_ATMEL\n #define CONFIG_SYS_MAX_NAND_DEVICE\t1\n-#define CONFIG_SYS_NAND_BASE\t\tATMEL_BASE_CS3\n+#define CONFIG_SYS_NAND_BASE\t\t0x80000000\n /* our ALE is AD21 */\n #define CONFIG_SYS_NAND_MASK_ALE\t(1 << 21)\n /* our CLE is AD22 */\ndiff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h\nindex 5ec785344a..f9a165eee8 100644\n--- a/include/configs/sama5d4ek.h\n+++ b/include/configs/sama5d4ek.h\n@@ -14,9 +14,12 @@\n \n #define CONFIG_BOARD_EARLY_INIT_F\n \n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xfc06863c\n+\n /* SDRAM */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE 0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x20000000\n \n #ifdef CONFIG_SPL_BUILD\n@@ -34,7 +37,7 @@\n #ifdef CONFIG_CMD_NAND\n #define CONFIG_NAND_ATMEL\n #define CONFIG_SYS_MAX_NAND_DEVICE\t1\n-#define CONFIG_SYS_NAND_BASE\t\tATMEL_BASE_CS3\n+#define CONFIG_SYS_NAND_BASE\t\t0x80000000\n /* our ALE is AD21 */\n #define CONFIG_SYS_NAND_MASK_ALE\t(1 << 21)\n /* our CLE is AD22 */\ndiff --git a/include/configs/vinco.h b/include/configs/vinco.h\nindex 0f3fc8f7d5..edb06b3258 100644\n--- a/include/configs/vinco.h\n+++ b/include/configs/vinco.h\n@@ -26,12 +26,15 @@\n \n /* serial console */\n #define CONFIG_ATMEL_USART\n-#define CONFIG_USART_BASE\t\tATMEL_BASE_USART3\n-#define\tCONFIG_USART_ID\t\t\tATMEL_ID_USART3\n+#define CONFIG_USART_BASE\t\t0xfc00c000\n+#define CONFIG_USART_ID\t\t\t30\n+\n+/* Timer */\n+#define CONFIG_SYS_TIMER_COUNTER\t0xfc06863c\n \n /* SDRAM */\n #define CONFIG_NR_DRAM_BANKS\t\t1\n-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS\n+#define CONFIG_SYS_SDRAM_BASE 0x20000000\n #define CONFIG_SYS_SDRAM_SIZE\t\t0x4000000\n \n #define CONFIG_SYS_INIT_SP_ADDR \\\n@@ -60,7 +63,7 @@\n #define CONFIG_MMC\n #define CONFIG_GENERIC_MMC\n #define CONFIG_GENERIC_ATMEL_MCI\n-#define ATMEL_BASE_MMCI\t\t\tATMEL_BASE_MCI1\n+#define ATMEL_BASE_MMCI\t\t\t0xfc000000\n #define CONFIG_SYS_MMC_CLK_OD\t\t500000\n \n /* For generating MMC partitions */\n","prefixes":["U-Boot","2/4"]}