{"id":2232220,"url":"http://patchwork.ozlabs.org/api/patches/2232220/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/CAMe9rOpsc6R-QXiGR=R6C0TVJTbjPtEyj8unUo1Yhh+CGTkcEg@mail.gmail.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2026-05-04T00:04:04","name":"or1k: Allow SImode for condition flag register","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ca2e1c720c8c59d4d89d72d5b9cd2014aa246897","submitter":{"id":4387,"url":"http://patchwork.ozlabs.org/api/people/4387/?format=json","name":"H.J. Lu","email":"hjl.tools@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/CAMe9rOpsc6R-QXiGR=R6C0TVJTbjPtEyj8unUo1Yhh+CGTkcEg@mail.gmail.com/mbox/","series":[{"id":502596,"url":"http://patchwork.ozlabs.org/api/series/502596/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=502596","date":"2026-05-04T00:04:04","name":"or1k: Allow SImode for condition flag register","version":1,"mbox":"http://patchwork.ozlabs.org/series/502596/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232220/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232220/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=MLty//tU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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Sun, 03 May 2026\n 17:04:41 -0700 (PDT)","MIME-Version":"1.0","From":"\"H.J. Lu\" ","Date":"Mon, 4 May 2026 08:04:04 +0800","X-Gm-Features":"AVHnY4Ls8PTQMRiB9B_MUFYkX5ySTY5e-vh9R8HJMjcUe78YFXkN3TfnE9R3XWk","Message-ID":"\n ","Subject":"[PATCH] or1k: Allow SImode for condition flag register","To":"GCC Patches , Stafford Horne ","Content-Type":"multipart/mixed; boundary=\"0000000000005f5d7a0650f2ad33\"","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"Commit\n\neb2ea476db2 emit-rtl: Allow extra checks for paradoxical subregs [PR119966]\n\nchanged validate_subreg to return false on the paradoxical SImode subreg\nof the OpenRISC condition flag register (reg:BI sr_f), which triggered\n\ninternal compiler error: in emit_move_multi_word, at expr.cc:4497\n\nc0694f95f59 or1k: Fix ICE in libgcc caused by recent validate_subreg changes\n\nchanged or1k_can_change_mode_class to allow changing flags mode from BI\nto SI. But or1k_hard_regno_mode_ok still returns false for condition\nflag register in SImode. Update or1k_hard_regno_mode_ok to also allow\ncondition flag register in SImode.\n\nTested with or1k Linux cross compiler for or1k glibc build.\n\ngcc/\n\nPR target/120587\nPR target/125155\n* config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Allow condition\ncondition flag register in SImode.\n\ngcc/testsuite/\n\nPR target/120587\nPR target/125155\n* gcc.target/or1k/pr125155.c: New test.","diff":"From d788754d9a90dd811a6c57b47407efd9aeb41890 Mon Sep 17 00:00:00 2001\nFrom: \"H.J. Lu\" \nDate: Mon, 4 May 2026 05:08:51 +0800\nSubject: [PATCH] or1k: Allow SImode for condition flag register\n\nCommit\n\neb2ea476db2 emit-rtl: Allow extra checks for paradoxical subregs [PR119966]\n\nchanged validate_subreg to return false on the paradoxical SImode subreg\nof the OpenRISC condition flag register (reg:BI sr_f), which triggered\n\ninternal compiler error: in emit_move_multi_word, at expr.cc:4497\n\nc0694f95f59 or1k: Fix ICE in libgcc caused by recent validate_subreg changes\n\nchanged or1k_can_change_mode_class to allow changing flags mode from BI\nto SI. But or1k_hard_regno_mode_ok still returns false for condition\nflag register in SImode. Update or1k_hard_regno_mode_ok to also allow\ncondition flag register in SImode.\n\nTested with or1k Linux cross compiler for or1k glibc build.\n\ngcc/\n\n\tPR target/120587\n\tPR target/125155\n\t* config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Allow condition\n\tcondition flag register in SImode.\n\ngcc/testsuite/\n\n\tPR target/120587\n\tPR target/125155\n\t* gcc.target/or1k/pr125155.c: New test.\n\nSigned-off-by: H.J. Lu \n---\n gcc/config/or1k/or1k.cc | 7 ++++---\n gcc/testsuite/gcc.target/or1k/pr125155.c | 14 ++++++++++++++\n 2 files changed, 18 insertions(+), 3 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/or1k/pr125155.c\n\ndiff --git a/gcc/config/or1k/or1k.cc b/gcc/config/or1k/or1k.cc\nindex 17240e3ee48..66fd784f8b9 100644\n--- a/gcc/config/or1k/or1k.cc\n+++ b/gcc/config/or1k/or1k.cc\n@@ -1389,10 +1389,11 @@ or1k_trampoline_init (rtx m_tramp, tree fndecl, rtx chain)\n static bool\n or1k_hard_regno_mode_ok (unsigned int regno, machine_mode mode)\n {\n- /* For OpenRISC, GENERAL_REGS can hold anything, while\n- FLAG_REGS are really single bits within SP[SR]. */\n+ /* For OpenRISC, GENERAL_REGS can hold anything, while FLAG_REGS are\n+ really single bits within SP[SR]. Also allow condition flag register\n+ in SImode to match or1k_can_change_mode_class. */\n if (REGNO_REG_CLASS (regno) == FLAG_REGS)\n- return mode == BImode;\n+ return mode == BImode || mode == SImode;\n return true;\n }\n \ndiff --git a/gcc/testsuite/gcc.target/or1k/pr125155.c b/gcc/testsuite/gcc.target/or1k/pr125155.c\nnew file mode 100644\nindex 00000000000..8ca95475b66\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/or1k/pr125155.c\n@@ -0,0 +1,14 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2\" } */\n+\n+int __pthread_keys_0_0;\n+int\n+___pthread_key_delete (void)\n+{\n+ int result = 22;\n+ int __atg3_old = 0;\n+ if (__atomic_compare_exchange_n (&__pthread_keys_0_0, &__atg3_old,\n+\t\t\t\t 0, 0, 2, 0))\n+ result = 0;\n+ return result;\n+}\n-- \n2.54.0\n\n","prefixes":[]}