{"id":2232135,"url":"http://patchwork.ozlabs.org/api/patches/2232135/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260503053451.48504-4-herumi@nifty.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260503053451.48504-4-herumi@nifty.com>","list_archive_url":null,"date":"2026-05-03T05:34:51","name":"[v2,3/3] i386: Add peephole2 to convert highpart mul to mulx","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4a72795bd7ae480721c029600d3c6e73eeff7971","submitter":{"id":92964,"url":"http://patchwork.ozlabs.org/api/people/92964/?format=json","name":null,"email":"herumi@nifty.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260503053451.48504-4-herumi@nifty.com/mbox/","series":[{"id":502562,"url":"http://patchwork.ozlabs.org/api/series/502562/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=502562","date":"2026-05-03T05:34:51","name":"Optimize 32-bit unsigned constant division for 64-bit targets","version":2,"mbox":"http://patchwork.ozlabs.org/series/502562/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232135/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232135/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nifty.com header.i=@nifty.com header.a=rsa-sha256\n header.s=default-1th84yt82rvi header.b=s3YpJ9Qc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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server2.sourceware.org","From":"herumi@nifty.com","To":"gcc-patches@gcc.gnu.org","Cc":"rguenther@suse.de, jeffreyalaw@gmail.com, ubizjak@gmail.com,\n MITSUNARI Shigeo ","Subject":"[PATCH v2 3/3] i386: Add peephole2 to convert highpart mul to mulx","Date":"Sun, 3 May 2026 14:34:51 +0900","Message-ID":"<20260503053451.48504-4-herumi@nifty.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260503053451.48504-1-herumi@nifty.com>","References":"<727728f8-76e5-457b-ab9f-d650550e0702@gmail.com>\n <20260503053451.48504-1-herumi@nifty.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n s=default-1th84yt82rvi; t=1777786552;\n bh=ZISUfCszu0hsdzu9Fj/8QO3oBsLRqtPCgK0Sep+awNw=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References;\n b=s3YpJ9QcoCJxXwhuikY/m1e9/hK+V5GbslVkoUF0F2hc4mmVSqHk+4zzFadmD5cn8/VivX+t\n SKpy6y5ZWqTh4gp1CCWsX/2Zf0wGOhraWuzXRNwFVJ1dRMaYcGrcaUqr+UhLB+IJTSQ7NcKgN5\n sPA7myqisHioMMLnM8fUuim6KPF95Z1TrJ3Sy1w2CQaJFdEdSIx7s8nTG92L1N52//yCthYuis\n 3jH4jJkJyz3rqqCGRkFKE1sQyNQjq5qZsqg91FTPPbY53DdB1QWlm8gE1OSwN3l+jo0JLy/SYZ\n DlEYkMkgy7m9z1ZEgPBqrFKs8i9swxTOPFtSf/mrbLu+RGaw==","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"From: MITSUNARI Shigeo \n\nWhen the register allocator selects the MUL-based highpart pattern\n(umuldi3_highpart) with the source value already in %rdx, it inserts\na redundant mov to %rax before the mul instruction. Add a peephole2\nthat detects this mov + mul sequence and converts it to a single mulx,\neliminating the extra mov.\n\nThis improves inlined loops that perform multiple unsigned divisions\nby constants. For example, a loop with three div-by-constant\noperations now generates 15 instructions (matching LLVM) instead\nof 18.\n\nBefore (loop body excerpt):\n\tmov\trax, rdx\n\tmul\tr9\n\nAfter:\n\tmulx\trdx, rax, r9\n\ngcc/ChangeLog:\n\n\t* config/i386/i386.md: Add peephole2 to convert\n\tmov + umul_highpart to mulx on BMI2 targets.\n---\n gcc/config/i386/i386.md | 17 +++++++++++++++++\n 1 file changed, 17 insertions(+)","diff":"diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md\nindex 472f9d41332..1c394690b04 100644\n--- a/gcc/config/i386/i386.md\n+++ b/gcc/config/i386/i386.md\n@@ -11522,6 +11522,23 @@\n (set_attr \"prefix\" \"vex\")\n (set_attr \"mode\" \"\")])\n \n+;; Convert mov + highpart mul to mulx when the mov source is %rdx.\n+;; mov %rdx, %rax; mulq %src -> mulx %src, %rax, %out\n+(define_peephole2\n+ [(set (match_operand:DWIH 0 \"register_operand\")\n+\t(match_operand:DWIH 1 \"register_operand\"))\n+ (parallel [(set (match_operand:DWIH 2 \"register_operand\")\n+\t\t (umul_highpart:DWIH (match_dup 0)\n+\t\t\t(match_operand:DWIH 3 \"nonimmediate_operand\")))\n+\t (clobber (match_dup 0))\n+\t (clobber (reg:CC FLAGS_REG))])]\n+ \"TARGET_BMI2\n+ && REGNO (operands[1]) == DX_REG\n+ && REGNO (operands[0]) != REGNO (operands[2])\"\n+ [(parallel [(set (match_dup 2)\n+\t\t (umul_highpart:DWIH (match_dup 1) (match_dup 3)))\n+\t (clobber (match_dup 0))])])\n+\n ;; Highpart multiplication patterns\n (define_insn \"mul3_highpart\"\n [(set (match_operand:DWIH 0 \"register_operand\" \"=d\")\n","prefixes":["v2","3/3"]}