{"id":2231543,"url":"http://patchwork.ozlabs.org/api/patches/2231543/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260430200704.352228-3-zhipingz@meta.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430200704.352228-3-zhipingz@meta.com>","list_archive_url":null,"date":"2026-04-30T20:06:57","name":"[v2,2/2] RDMA/mlx5: get tph for p2p access when registering dma-buf mr","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3ea6d513f2fc7322f3c4f37c1a87e1ba3633aafe","submitter":{"id":92088,"url":"http://patchwork.ozlabs.org/api/people/92088/?format=json","name":"Zhiping Zhang","email":"zhipingz@meta.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260430200704.352228-3-zhipingz@meta.com/mbox/","series":[{"id":502373,"url":"http://patchwork.ozlabs.org/api/series/502373/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=502373","date":"2026-04-30T20:06:56","name":"vfio/dma-buf: add TPH support for peer-to-peer access","version":2,"mbox":"http://patchwork.ozlabs.org/series/502373/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231543/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231543/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-pci+bounces-53538-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=meta.com header.i=@meta.com header.a=rsa-sha256\n header.s=s2048-2025-q2 header.b=LPX2prnm;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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arc=none smtp.client-ip=67.231.145.42","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=meta.com; h=cc\n\t:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=s2048-2025-q2;\n\t bh=+CctzKmPD0mZYNaUqqbHQ9y/m7DXh0Zn+N73X9LhqfM=; b=LPX2prnm7kxp\n\tsIUSSBr8vUmzakv5GIA35ijPUajL0sKIpyMQ4PoTOjGkjbD1YTraAKUYHR9Ak4QJ\n\tkSdHd1hzQRl3NvJ8yF7+ZFZc1wod9xeyoZ+DA4uPKkYXT3DkpIfkz4gwJQBi2h1M\n\tfWQzHcjEC+LQZScAO2372RTrJyb09azlMcPE2g1UuXIGh806pxdtvoMbl6CKbS90\n\tNCwU3Umy+mdrQAkHrgu6/+/8BhQ+9D1JVW/4l+DJ4Ssn+RMMWYYNplputHuvISQ+\n\tQdkbFezdlY+SP+IioU6KUtyhT577zdO/5LGtHBxkriel60LP24iY6508GSiqmcpO\n\teD7dCFVakQ==","From":"Zhiping Zhang <zhipingz@meta.com>","To":"Alex Williamson <alex@shazbot.org>, Jason Gunthorpe <jgg@ziepe.ca>,\n        Leon\n Romanovsky <leon@kernel.org>","CC":"Bjorn Helgaas <helgaas@kernel.org>, <linux-rdma@vger.kernel.org>,\n        <linux-pci@vger.kernel.org>, <netdev@vger.kernel.org>,\n        <dri-devel@lists.freedesktop.org>, Keith Busch <kbusch@kernel.org>,\n        Yochai\n Cohen <yochai@nvidia.com>, Yishai Hadas <yishaih@nvidia.com>,\n        Zhiping Zhang\n\t<zhipingz@meta.com>","Subject":"[PATCH v2 2/2] RDMA/mlx5: get tph for p2p access when registering\n dma-buf mr","Date":"Thu, 30 Apr 2026 13:06:57 -0700","Message-ID":"<20260430200704.352228-3-zhipingz@meta.com>","X-Mailer":"git-send-email 2.52.0","In-Reply-To":"<20260430200704.352228-1-zhipingz@meta.com>","References":"<20260430200704.352228-1-zhipingz@meta.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"quoted-printable","X-FB-Internal":"Safe","Content-Type":"text/plain","X-Proofpoint-GUID":"FgAIDjlKRuAMWm36NGZmy6CyBHYFA54m","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDMwMDIwOCBTYWx0ZWRfXzRiskCe+gNXs\n PWUjaJBY0W+OTvX5nJi+9ueT7MUhURHz7ZmKJBj+I3COTABuuAXM1dw/RaQUdvwTz08JwB3R9tB\n RyxhUHs3+YiaIMt4R17fiKqRrKE77i81JxVBUFs7eU1AH5hQ91+joIu91/JdfJDyNr1xl07fDH+\n o+CPfAUWVmTfcKt8AGNo3OlQmVvZiLHWTTVVWJ1h9z0hg4kgkI5zF9wa0H0hWXfaF3YGPsLCRXI\n FtHmOu8sjMqD9yu7l2emx7M/Eh4sqELt/OtqwMnpdu4cP9QBYTV5ocPz6XAzDqlTIdU6pQWXZrj\n dVCytKaPjEYXrCH3aSl31WEPTZt6CGGvFkUKBrF86EKHOU1EuAPj0RvXq4ePpJUVo+z1M7hc3P/\n CBxJ+La7ukrMVVi1Y97IhBT8RVkFIGU1cVuLxgB3M6cVxCftEF9iBI2UVG97aGwzUP6mtwqFw/Q\n bFPNT0eIvCtvOP7BuNQ==","X-Proofpoint-ORIG-GUID":"FgAIDjlKRuAMWm36NGZmy6CyBHYFA54m","X-Authority-Analysis":"v=2.4 cv=UYphjqSN c=1 sm=1 tr=0 ts=69f3b773 cx=c_pps\n a=MfjaFnPeirRr97d5FC5oHw==:117 a=MfjaFnPeirRr97d5FC5oHw==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7x6HtfJdh03M6CCDgxCd:22\n a=PAz_-FQ8hEVmOPYdF0yf:22 a=VabnemYjAAAA:8 a=c4au4WjlRKfxtgWlyl4A:9\n a=gKebqoRLp9LExxC7YDUY:22","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-30_05,2026-04-30_02,2025-10-01_01"},"content":"Query dma-buf TPH metadata when registering a dma-buf MR for peer to\npeer access and translate the raw steering tag into an mlx5 steering tag\nindex. Factor mlx5_st_alloc_index() so callers that already have a raw\nsteering tag can allocate the corresponding mlx5 index directly. Keep the\nDMAH path as the first priority and only fall back to dma-buf metadata when\nno DMAH is supplied.\n\nPass the device's supported ST width (8 or 16 bit, derived from\npdev->tph_req_type) to get_tph() so the exporter can reject tags that\nexceed the consumer's capability. Initialize ret in mlx5_st_create() so the\ncached steering-tag path returns success cleanly under clang builds.\n\nSigned-off-by: Zhiping Zhang <zhipingz@meta.com>","diff":"diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c\n--- a/drivers/infiniband/hw/mlx5/mr.c\n+++ b/drivers/infiniband/hw/mlx5/mr.c\n@@ -46,6 +46,8 @@\n #include \"data_direct.h\"\n #include \"dmah.h\"\n \n+MODULE_IMPORT_NS(\"DMA_BUF\");\n+\n static int mkey_max_umr_order(struct mlx5_ib_dev *dev)\n {\n \tif (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset))\n@@ -899,6 +901,40 @@ static struct dma_buf_attach_ops mlx5_ib_dmabuf_attach_ops = {\n \t.invalidate_mappings = mlx5_ib_dmabuf_invalidate_cb,\n };\n \n+static void get_tph_mr_dmabuf(struct mlx5_ib_dev *dev, int fd, u16 *st_index,\n+\t\t\t      u8 *ph)\n+{\n+\tstruct pci_dev *pdev = dev->mdev->pdev;\n+\tstruct dma_buf *dmabuf;\n+\tu16 steering_tag;\n+\tu8 st_width;\n+\tint ret;\n+\n+\tst_width = (pdev->tph_req_type == PCI_TPH_REQ_EXT_TPH) ? 16 : 8;\n+\n+\tdmabuf = dma_buf_get(fd);\n+\tif (IS_ERR(dmabuf))\n+\t\treturn;\n+\n+\tif (!dmabuf->ops->get_tph)\n+\t\tgoto end_dbuf_put;\n+\n+\tret = dmabuf->ops->get_tph(dmabuf, &steering_tag, ph, st_width);\n+\tif (ret) {\n+\t\tmlx5_ib_dbg(dev, \"get_tph failed (%d)\\n\", ret);\n+\t\tgoto end_dbuf_put;\n+\t}\n+\n+\tret = mlx5_st_alloc_index_by_tag(dev->mdev, steering_tag, st_index);\n+\tif (ret) {\n+\t\t*ph = MLX5_IB_NO_PH;\n+\t\tmlx5_ib_dbg(dev, \"st_alloc_index_by_tag failed (%d)\\n\", ret);\n+\t}\n+\n+end_dbuf_put:\n+\tdma_buf_put(dmabuf);\n+}\n+\n static struct ib_mr *\n reg_user_mr_dmabuf(struct ib_pd *pd, struct device *dma_device,\n \t\t   u64 offset, u64 length, u64 virt_addr,\n@@ -941,6 +977,8 @@ reg_user_mr_dmabuf(struct ib_pd *pd, struct device *dma_device,\n \t\tph = dmah->ph;\n \t\tif (dmah->valid_fields & BIT(IB_DMAH_CPU_ID_EXISTS))\n \t\t\tst_index = mdmah->st_index;\n+\t} else {\n+\t\tget_tph_mr_dmabuf(dev, fd, &st_index, &ph);\n \t}\n \n \tmr = alloc_cacheable_mr(pd, &umem_dmabuf->umem, virt_addr,\ndiff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c\n--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c\n@@ -29,7 +29,7 @@ struct mlx5_st *mlx5_st_create(struct mlx5_core_dev *dev)\n \tu8 direct_mode = 0;\n \tu16 num_entries;\n \tu32 tbl_loc;\n-\tint ret;\n+\tint ret = 0;\n \n \tif (!MLX5_CAP_GEN(dev, mkey_pcie_tph))\n \t\treturn NULL;\n@@ -92,23 +92,18 @@ void mlx5_st_destroy(struct mlx5_core_dev *dev)\n \tkfree(st);\n }\n \n-int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n-\t\t\tunsigned int cpu_uid, u16 *st_index)\n+int mlx5_st_alloc_index_by_tag(struct mlx5_core_dev *dev, u16 tag,\n+\t\t\t       u16 *st_index)\n {\n \tstruct mlx5_st_idx_data *idx_data;\n \tstruct mlx5_st *st = dev->st;\n \tunsigned long index;\n \tu32 xa_id;\n-\tu16 tag;\n-\tint ret;\n+\tint ret = 0;\n \n \tif (!st)\n \t\treturn -EOPNOTSUPP;\n \n-\tret = pcie_tph_get_cpu_st(dev->pdev, mem_type, cpu_uid, &tag);\n-\tif (ret)\n-\t\treturn ret;\n-\n \tif (st->direct_mode) {\n \t\t*st_index = tag;\n \t\treturn 0;\n@@ -152,6 +147,20 @@ int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n \tmutex_unlock(&st->lock);\n \treturn ret;\n }\n+EXPORT_SYMBOL_GPL(mlx5_st_alloc_index_by_tag);\n+\n+int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n+\t\t\tunsigned int cpu_uid, u16 *st_index)\n+{\n+\tu16 tag;\n+\tint ret;\n+\n+\tret = pcie_tph_get_cpu_st(dev->pdev, mem_type, cpu_uid, &tag);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn mlx5_st_alloc_index_by_tag(dev, tag, st_index);\n+}\n EXPORT_SYMBOL_GPL(mlx5_st_alloc_index);\n \n int mlx5_st_dealloc_index(struct mlx5_core_dev *dev, u16 st_index)\ndiff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h\n--- a/include/linux/mlx5/driver.h\n+++ b/include/linux/mlx5/driver.h\n@@ -1166,10 +1166,17 @@ int mlx5_dm_sw_icm_dealloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type\n \t\t\t   u64 length, u16 uid, phys_addr_t addr, u32 obj_id);\n \n #ifdef CONFIG_PCIE_TPH\n+int mlx5_st_alloc_index_by_tag(struct mlx5_core_dev *dev, u16 tag,\n+\t\t\t       u16 *st_index);\n int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,\n \t\t\tunsigned int cpu_uid, u16 *st_index);\n int mlx5_st_dealloc_index(struct mlx5_core_dev *dev, u16 st_index);\n #else\n+static inline int mlx5_st_alloc_index_by_tag(struct mlx5_core_dev *dev,\n+\t\t\t\t\t     u16 tag, u16 *st_index)\n+{\n+\treturn -EOPNOTSUPP;\n+}\n static inline int mlx5_st_alloc_index(struct mlx5_core_dev *dev,\n \t\t\t\t      enum tph_mem_type mem_type,\n \t\t\t\t      unsigned int cpu_uid, u16 *st_index)\n","prefixes":["v2","2/2"]}