{"id":2231469,"url":"http://patchwork.ozlabs.org/api/patches/2231469/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-46-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430172204.1006673-46-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-04-30T17:21:51","name":"[PULL,45/58] target: i386: HLT type that ignores EFLAGS.IF","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f7a2f8466aa64a8563011acfa9885cf3d551db6b","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-46-pbonzini@redhat.com/mbox/","series":[{"id":502347,"url":"http://patchwork.ozlabs.org/api/series/502347/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347","date":"2026-04-30T17:21:16","name":"[PULL,01/58] pythondeps: bump to meson 1.11.1","version":1,"mbox":"http://patchwork.ozlabs.org/series/502347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231469/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231469/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=C2TkZQK/;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=google header.b=K83DfbDG;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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The virtual processor will\n> be woken when an interrupt arrives, regardless of whether the interrupt\n> is enabled on the virtual processor or not.\n\nMeanwhile, Windows 24H2+ calls this MSR anyway without the privilege being set.\n\nAdd the infrastructure to support it on the generic QEMU side.\n\nSigned-off-by: Mohamed Mediouni \nLink: https://lore.kernel.org/r/20260422214225.2242-22-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini \n---\n target/i386/cpu.h | 9 +++++++++\n target/i386/cpu.c | 10 ++++------\n target/i386/hvf/x86hvf.c | 4 ++--\n target/i386/whpx/whpx-all.c | 5 ++++-\n 4 files changed, 19 insertions(+), 9 deletions(-)","diff":"diff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 6401028e70d..c14237967b5 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -225,6 +225,7 @@ typedef enum X86Seg {\n #define HF2_NPT_SHIFT 6 /* Nested Paging enabled */\n #define HF2_IGNNE_SHIFT 7 /* Ignore CR0.NE=0 */\n #define HF2_VGIF_SHIFT 8 /* Can take VIRQ*/\n+#define HF2_HYPERV_HLT_SHIFT 9 /* Hyper-V HV_X64_MSR_GUEST_IDLE */\n \n #define HF2_GIF_MASK (1 << HF2_GIF_SHIFT)\n #define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)\n@@ -235,6 +236,7 @@ typedef enum X86Seg {\n #define HF2_NPT_MASK (1 << HF2_NPT_SHIFT)\n #define HF2_IGNNE_MASK (1 << HF2_IGNNE_SHIFT)\n #define HF2_VGIF_MASK (1 << HF2_VGIF_SHIFT)\n+#define HF2_HYPERV_HLT_MASK (1 << HF2_HYPERV_HLT_SHIFT)\n \n #define CR0_PE_SHIFT 0\n #define CR0_MP_SHIFT 1\n@@ -3085,6 +3087,13 @@ static inline bool ctl_has_irq(CPUX86State *env)\n return (env->int_ctl & V_IRQ_MASK) && (int_prio >= tpr);\n }\n \n+static inline bool x86_cpu_interrupts_enabled(CPUX86State *env)\n+{\n+ return ((env->eflags & IF_MASK) &&\n+ !(env->hflags & HF_INHIBIT_IRQ_MASK)) ||\n+ (env->hflags2 & HF2_HYPERV_HLT_MASK);\n+}\n+\n #if defined(TARGET_X86_64) && \\\n defined(CONFIG_USER_ONLY) && \\\n defined(CONFIG_LINUX)\ndiff --git a/target/i386/cpu.c b/target/i386/cpu.c\nindex 7ea80f07c7c..efe7ba014d3 100644\n--- a/target/i386/cpu.c\n+++ b/target/i386/cpu.c\n@@ -10617,14 +10617,12 @@ int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request)\n (((env->hflags2 & HF2_VINTR_MASK) &&\n (env->hflags2 & HF2_HIF_MASK)) ||\n (!(env->hflags2 & HF2_VINTR_MASK) &&\n- (env->eflags & IF_MASK &&\n- !(env->hflags & HF_INHIBIT_IRQ_MASK))))) {\n+ x86_cpu_interrupts_enabled(env)))) {\n return CPU_INTERRUPT_HARD;\n } else if (env->hflags2 & HF2_VGIF_MASK) {\n- if((interrupt_request & CPU_INTERRUPT_VIRQ) &&\n- (env->eflags & IF_MASK) &&\n- !(env->hflags & HF_INHIBIT_IRQ_MASK)) {\n- return CPU_INTERRUPT_VIRQ;\n+ if ((interrupt_request & CPU_INTERRUPT_VIRQ) &&\n+ x86_cpu_interrupts_enabled(env)) {\n+ return CPU_INTERRUPT_VIRQ;\n }\n }\n }\ndiff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c\nindex bb480311b0f..16b810f3c2e 100644\n--- a/target/i386/hvf/x86hvf.c\n+++ b/target/i386/hvf/x86hvf.c\n@@ -405,9 +405,9 @@ bool hvf_inject_interrupts(CPUState *cs)\n }\n }\n \n- if (!(env->hflags & HF_INHIBIT_IRQ_MASK) &&\n+ if (x86_cpu_interrupts_enabled(env) &&\n cpu_test_interrupt(cs, CPU_INTERRUPT_HARD) &&\n- (env->eflags & IF_MASK) && !(info & VMCS_INTR_VALID)) {\n+ !(info & VMCS_INTR_VALID)) {\n int line = cpu_get_pic_interrupt(env);\n cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);\n if (line >= 0) {\ndiff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 11c9d8729fa..bc8d673c31a 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -1630,11 +1630,14 @@ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid)\n \n static int whpx_handle_halt(CPUState *cpu)\n {\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+\n int ret = 0;\n \n bql_lock();\n if (!(cpu_test_interrupt(cpu, CPU_INTERRUPT_HARD) &&\n- (cpu_env(cpu)->eflags & IF_MASK)) &&\n+ x86_cpu_interrupts_enabled(env)) &&\n !cpu_test_interrupt(cpu, CPU_INTERRUPT_NMI)) {\n cpu->exception_index = EXCP_HLT;\n cpu->halted = true;\n","prefixes":["PULL","45/58"]}