{"id":2231468,"url":"http://patchwork.ozlabs.org/api/patches/2231468/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-47-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430172204.1006673-47-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-04-30T17:21:52","name":"[PULL,46/58] whpx: i386: add HV_X64_MSR_GUEST_IDLE when !kernel-irqchip","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"577eac8244944668856df069527a0d8c1941f7ed","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-47-pbonzini@redhat.com/mbox/","series":[{"id":502347,"url":"http://patchwork.ozlabs.org/api/series/502347/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347","date":"2026-04-30T17:21:16","name":"[PULL,01/58] pythondeps: bump to meson 1.11.1","version":1,"mbox":"http://patchwork.ozlabs.org/series/502347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231468/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231468/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 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SMTP id\n 6a1803df08f44-8b3fe727594mr60926886d6.12.1777569870956;\n Thu, 30 Apr 2026 10:24:30 -0700 (PDT)","by 2002:a05:6214:3986:b0:8ac:a62a:a451 with SMTP id\n 6a1803df08f44-8b3fe727594mr60926246d6.12.1777569870315;\n Thu, 30 Apr 2026 10:24:30 -0700 (PDT)"],"From":"Paolo Bonzini ","To":"qemu-devel@nongnu.org","Cc":"Mohamed Mediouni ","Subject":"[PULL 46/58] whpx: i386: add HV_X64_MSR_GUEST_IDLE when\n !kernel-irqchip","Date":"Thu, 30 Apr 2026 19:21:52 +0200","Message-ID":"<20260430172204.1006673-47-pbonzini@redhat.com>","X-Mailer":"git-send-email 2.54.0","In-Reply-To":"<20260430172204.1006673-1-pbonzini@redhat.com>","References":"<20260430172204.1006673-1-pbonzini@redhat.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=170.10.129.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni \n\nAdd support for an oddball HV_X64_MSR_GUEST_IDLE not-quite-an-HLT\nthat wakes the vCPU even if EFLAGS.IF is set.\n\nSigned-off-by: Mohamed Mediouni \nLink: https://lore.kernel.org/r/20260422214225.2242-23-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini \n---\n target/i386/whpx/whpx-all.c | 27 ++++++++++++++++++++++++++-\n 1 file changed, 26 insertions(+), 1 deletion(-)","diff":"diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex bc8d673c31a..593a707e219 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -52,6 +52,7 @@\n /* for kernel-irqchip=off */\n #define HV_X64_MSR_APIC_FREQUENCY 0x40000023\n #define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073\n+#define HV_X64_MSR_GUEST_IDLE 0x400000f0\n \n static bool is_modern_os = true;\n \n@@ -1648,6 +1649,15 @@ static int whpx_handle_halt(CPUState *cpu)\n return ret;\n }\n \n+static int whpx_handle_hyperv_guestidle(CPUState *cpu)\n+{\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+\n+ env->hflags2 |= HF2_HYPERV_HLT_MASK;\n+ return whpx_handle_halt(cpu);\n+}\n+\n static void whpx_vcpu_kick_out_of_hlt(CPUState *cpu) \n {\n WHV_REGISTER_VALUE reg;\n@@ -1851,9 +1861,10 @@ static void whpx_vcpu_process_async_events(CPUState *cpu)\n }\n \n if ((cpu_test_interrupt(cpu, CPU_INTERRUPT_HARD) &&\n- (env->eflags & IF_MASK)) ||\n+ ((env->eflags & IF_MASK) || (env->hflags2 & HF2_HYPERV_HLT_MASK))) ||\n cpu_test_interrupt(cpu, CPU_INTERRUPT_NMI)) {\n cpu->halted = false;\n+ env->hflags2 &= ~HF2_HYPERV_HLT_MASK;\n }\n \n if (cpu_test_interrupt(cpu, CPU_INTERRUPT_SIPI)) {\n@@ -2128,6 +2139,20 @@ int whpx_vcpu_run(CPUState *cpu)\n }\n }\n \n+ /*\n+ * Windows and Linux both use this MSR.\n+ * Windows 11 25H2 uses it even when not advertised.\n+ */\n+ if (vcpu->exit_ctx.MsrAccess.MsrNumber == HV_X64_MSR_GUEST_IDLE\n+ && !vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite\n+ && !whpx_irqchip_in_kernel()\n+ && whpx->hyperv_enlightenments_enabled) {\n+ is_known_msr = 1;\n+ whpx_bump_rip(cpu, &vcpu->exit_ctx);\n+ ret = whpx_handle_hyperv_guestidle(cpu);\n+ break;\n+ }\n+\n /*\n * Linux tries to use it anyway even when not exposed.\n * Ignore the write as the VP assist page is not used.\n","prefixes":["PULL","46/58"]}