{"id":2231462,"url":"http://patchwork.ozlabs.org/api/patches/2231462/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-59-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430172204.1006673-59-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-04-30T17:22:04","name":"[PULL,58/58] whpx: i386: documentation update","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5dbb88ba9ccded35d7f1aa1da873c4d6f8b2d11d","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-59-pbonzini@redhat.com/mbox/","series":[{"id":502347,"url":"http://patchwork.ozlabs.org/api/series/502347/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347","date":"2026-04-30T17:21:16","name":"[PULL,01/58] pythondeps: bump to meson 1.11.1","version":1,"mbox":"http://patchwork.ozlabs.org/series/502347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231462/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231462/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com 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envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nLink: https://lore.kernel.org/r/20260422214225.2242-38-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\n---\n docs/system/whpx.rst | 40 +++++++++++-----------------------------\n 1 file changed, 11 insertions(+), 29 deletions(-)","diff":"diff --git a/docs/system/whpx.rst b/docs/system/whpx.rst\nindex 3e1979028c9..9909e86831b 100644\n--- a/docs/system/whpx.rst\n+++ b/docs/system/whpx.rst\n@@ -63,7 +63,7 @@ additional functionality compared to ``-device ramfb``, but is\n incompatible with Windows's UEFI GOP implementation, which\n expects a linear framebuffer to be available.\n \n-Some tracing options\n+Accelerator options\n --------------------\n \n x86_64\n@@ -75,6 +75,11 @@ to undocumented MSRs.\n ``-d invalid_mem`` allows to trace accesses to unmapped\n GPAs.\n \n+``-accel whpx,ssd=off`` disables the separate security domain feature,\n+as in a BTB flush when entering/exiting the guest. This results in a\n+significant MMIO performance increase at the detriment of security\n+mitigations.\n+\n Known issues on x86_64\n ----------------------\n \n@@ -96,45 +101,22 @@ MMX, SSE or AVX instructions for access to MMIO memory ranges.\n Attempts to run such guests will result in an ``Unimplemented handler``\n warning for MMX and a failure to decode for newer instructions.\n \n-``-M isapc``\n-^^^^^^^^^^^^\n-\n-``-M isapc`` doesn't disable the Hyper-V LAPIC on its own yet. To\n-be able to use that machine, use ``-accel whpx,hyperv=off,kernel-irqchip=off``.\n-\n-However, in QEMU 11.0, the guest will still be a 64-bit x86\n-ISA machine with all the corresponding CPUID leaves exposed.\n-\n-gdbstub\n-^^^^^^^\n-\n-As save/restore of xsave state is not currently present, state\n-exposed through GDB will be incomplete.\n-\n-The same also applies to ``info registers``.\n-\n-``-cpu type`` ignored\n-^^^^^^^^^^^^^^^^^^^^^\n-\n-In this release, -cpu is an ignored argument. \n-\n PIC interrupts on Windows 10\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n \n On Windows 10, a legacy PIC interrupt injected does not wake the guest\n from an HLT when using the Hyper-V provided interrupt controller.\n \n-This has been addressed in QEMU 11.0 on Windows 11 platforms but\n-functionality to make it available on Windows 10 isn't present.\n+As such, on Windows 10, using the Hyper-V interrupt controller is\n+disabled by default. You can enable it via ``-M q35,pic=off`` which\n+disables the PIC. In that configuration, using a UEFI is recommended.\n \n-Workaround: for affected use cases, use ``-M kernel-irqchip=off``.\n+On this release, ``-M kernel-irqchip=`` is not expected to be manually\n+set during normal operation. It remains as a debugging option.\n \n Known issues on Windows 11\n ^^^^^^^^^^^^^^^^^^^^^^^^^^\n \n-Nested virtualisation-specific Hyper-V enlightenments are not\n-currently exposed.\n-\n arm64\n -----\n \n","prefixes":["PULL","58/58"]}