{"id":2231456,"url":"http://patchwork.ozlabs.org/api/patches/2231456/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-42-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430172204.1006673-42-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-04-30T17:21:47","name":"[PULL,41/58] whpx: i386: don't increment eip on MSR access raising GPF","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8de5ffc38261c750a8c30840b592f608a3643352","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-42-pbonzini@redhat.com/mbox/","series":[{"id":502347,"url":"http://patchwork.ozlabs.org/api/series/502347/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347","date":"2026-04-30T17:21:16","name":"[PULL,01/58] pythondeps: bump to meson 1.11.1","version":1,"mbox":"http://patchwork.ozlabs.org/series/502347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231456/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231456/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com 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client-ip=170.10.133.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nLink: https://lore.kernel.org/r/20260422214225.2242-33-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\n---\n target/i386/whpx/whpx-all.c | 11 +++++++++++\n 1 file changed, 11 insertions(+)","diff":"diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex eecc7f48ed9..4bb99a8e900 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -2048,6 +2048,7 @@ int whpx_vcpu_run(CPUState *cpu)\n             WHV_REGISTER_NAME reg_names[3];\n             UINT32 reg_count;\n             bool is_known_msr = 0; \n+            bool raises_gpf = false;\n             uint64_t val;\n \n             if (vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite) {\n@@ -2086,6 +2087,7 @@ int whpx_vcpu_run(CPUState *cpu)\n                     int msr_ret = cpu_set_apic_base(X86_CPU(cpu)->apic_state, val);\n                     if (msr_ret < 0) {\n                         x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+                        raises_gpf = true;\n                     } else {\n                         whpx_set_reg(cpu, WHvX64RegisterApicBase, reg);\n                     }\n@@ -2105,6 +2107,7 @@ int whpx_vcpu_run(CPUState *cpu)\n                     reg_values[1].Reg64 = val;\n                     if (msr_ret < 0) {\n                         x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+                        raises_gpf = true;\n                     }\n                 } else {\n                     bql_lock();\n@@ -2112,6 +2115,7 @@ int whpx_vcpu_run(CPUState *cpu)\n                     bql_unlock();\n                     if (msr_ret < 0) {\n                         x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+                        raises_gpf = true;\n                     }\n                 }\n             }\n@@ -2135,6 +2139,13 @@ int whpx_vcpu_run(CPUState *cpu)\n \n             if (!is_known_msr && !whpx->ignore_unknown_msr) {\n                 x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+                raises_gpf = true;\n+            }\n+\n+            /* When a GPF is raised, do not change Rip. */\n+            if (raises_gpf) {\n+                reg_values[0].Reg64 =\n+                    vcpu->exit_ctx.VpContext.Rip;\n             }\n \n             hr = whp_dispatch.WHvSetVirtualProcessorRegisters(\n","prefixes":["PULL","41/58"]}