{"id":2231442,"url":"http://patchwork.ozlabs.org/api/patches/2231442/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-41-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430172204.1006673-41-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-04-30T17:21:46","name":"[PULL,40/58] whpx: i386: unknown MSR configurability","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"298afcd3e1a66951f7f1cb57378984bb00061d00","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-41-pbonzini@redhat.com/mbox/","series":[{"id":502347,"url":"http://patchwork.ozlabs.org/api/series/502347/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347","date":"2026-04-30T17:21:16","name":"[PULL,01/58] pythondeps: bump to meson 1.11.1","version":1,"mbox":"http://patchwork.ozlabs.org/series/502347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231442/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231442/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 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SMTP id\n d75a77b69052e-5102ad9b124mr54357981cf.25.1777569851892;\n Thu, 30 Apr 2026 10:24:11 -0700 (PDT)","by 2002:a05:622a:1ccf:b0:50e:601a:217f with SMTP id\n d75a77b69052e-5102ad9b124mr54357191cf.25.1777569851308;\n Thu, 30 Apr 2026 10:24:11 -0700 (PDT)"],"From":"Paolo Bonzini ","To":"qemu-devel@nongnu.org","Cc":"Mohamed Mediouni ","Subject":"[PULL 40/58] whpx: i386: unknown MSR configurability","Date":"Thu, 30 Apr 2026 19:21:46 +0200","Message-ID":"<20260430172204.1006673-41-pbonzini@redhat.com>","X-Mailer":"git-send-email 2.54.0","In-Reply-To":"<20260430172204.1006673-1-pbonzini@redhat.com>","References":"<20260430172204.1006673-1-pbonzini@redhat.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=170.10.133.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni \n\nAdd an option to inject back a GPF for unknown MSRs.\n\nKeep it on by default for now as Linux expects accesses to some\nAMD-specific MSRs to always succeed when on an AMD host.\n\nSigned-off-by: Mohamed Mediouni \nLink: https://lore.kernel.org/r/20260422214225.2242-18-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini \n---\n include/system/whpx-all.h | 1 +\n include/system/whpx-internal.h | 1 +\n accel/whpx/whpx-common.c | 3 +++\n target/arm/whpx/whpx-all.c | 4 +++\n target/i386/whpx/whpx-all.c | 45 ++++++++++++++++++++++++++++++++++\n 5 files changed, 54 insertions(+)","diff":"diff --git a/include/system/whpx-all.h b/include/system/whpx-all.h\nindex 2cbea71b149..4022571ffff 100644\n--- a/include/system/whpx-all.h\n+++ b/include/system/whpx-all.h\n@@ -20,6 +20,7 @@ void whpx_translate_cpu_breakpoints(\n CPUState *cpu,\n int cpu_breakpoint_count);\n void whpx_arch_destroy_vcpu(CPUState *cpu);\n+void whpx_arch_accel_class_init(ObjectClass *oc);\n \n /* called by whpx-accel-ops */\n bool whpx_arch_supports_guest_debug(void);\ndiff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h\nindex cf782cf5f89..86639627b36 100644\n--- a/include/system/whpx-internal.h\n+++ b/include/system/whpx-internal.h\n@@ -47,6 +47,7 @@ struct whpx_state {\n bool hyperv_enlightenments_required;\n bool hyperv_enlightenments_enabled;\n \n+ bool ignore_unknown_msr;\n };\n \n extern struct whpx_state whpx_global;\ndiff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c\nindex 59be996aefc..497c03138ec 100644\n--- a/accel/whpx/whpx-common.c\n+++ b/accel/whpx/whpx-common.c\n@@ -538,6 +538,8 @@ static void whpx_accel_class_init(ObjectClass *oc, const void *data)\n NULL, NULL);\n object_class_property_set_description(oc, \"hyperv\",\n \"Configure Hyper-V enlightenments\");\n+\n+ whpx_arch_accel_class_init(oc);\n }\n \n static void whpx_accel_instance_init(Object *obj)\n@@ -552,6 +554,7 @@ static void whpx_accel_instance_init(Object *obj)\n whpx->hyperv_enlightenments_required = false;\n /* Value determined at whpx_accel_init */\n whpx->hyperv_enlightenments_enabled = false;\n+ whpx->ignore_unknown_msr = true;\n }\n \n static const TypeInfo whpx_accel_type = {\ndiff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c\nindex 4019a513aa7..94304a4230b 100644\n--- a/target/arm/whpx/whpx-all.c\n+++ b/target/arm/whpx/whpx-all.c\n@@ -823,6 +823,10 @@ void whpx_cpu_instance_init(CPUState *cs)\n {\n }\n \n+void whpx_arch_accel_class_init(ObjectClass *oc)\n+{\n+}\n+\n int whpx_accel_init(AccelState *as, MachineState *ms)\n {\n struct whpx_state *whpx;\ndiff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 9fc44f8a67e..eecc7f48ed9 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -2133,6 +2133,10 @@ int whpx_vcpu_run(CPUState *cpu)\n vcpu->exit_ctx.MsrAccess.AccessInfo.IsWrite);\n }\n \n+ if (!is_known_msr && !whpx->ignore_unknown_msr) {\n+ x86_emul_raise_exception(&X86_CPU(cpu)->env, EXCP0D_GPF, 0);\n+ }\n+\n hr = whp_dispatch.WHvSetVirtualProcessorRegisters(\n whpx->partition,\n cpu->cpu_index,\n@@ -2532,6 +2536,47 @@ void whpx_cpu_instance_init(CPUState *cs)\n * Partition support\n */\n \n+static void whpx_set_unknown_msr(Object *obj, Visitor *v,\n+ const char *name, void *opaque,\n+ Error **errp)\n+{\n+ struct whpx_state *whpx = &whpx_global;\n+ OnOffAuto mode;\n+\n+ if (!visit_type_OnOffAuto(v, name, &mode, errp)) {\n+ return;\n+ }\n+\n+ switch (mode) {\n+ case ON_OFF_AUTO_ON:\n+ whpx->ignore_unknown_msr = true;\n+ break;\n+\n+ case ON_OFF_AUTO_OFF:\n+ whpx->ignore_unknown_msr = false;\n+ break;\n+\n+ case ON_OFF_AUTO_AUTO:\n+ whpx->ignore_unknown_msr = true;\n+ break;\n+ default:\n+ /*\n+ * The value was checked in visit_type_OnOffAuto() above. If\n+ * we get here, then something is wrong in QEMU.\n+ */\n+ abort();\n+ }\n+}\n+\n+void whpx_arch_accel_class_init(ObjectClass *oc)\n+{\n+ object_class_property_add(oc, \"ignore-unknown-msr\", \"OnOffAuto\",\n+ NULL, whpx_set_unknown_msr,\n+ NULL, NULL);\n+ object_class_property_set_description(oc, \"ignore-unknown-msr\",\n+ \"Configure unknown MSR behavior\");\n+}\n+\n int whpx_accel_init(AccelState *as, MachineState *ms)\n {\n struct whpx_state *whpx;\n","prefixes":["PULL","40/58"]}