{"id":2231417,"url":"http://patchwork.ozlabs.org/api/patches/2231417/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-4-pbonzini@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430172204.1006673-4-pbonzini@redhat.com>","list_archive_url":null,"date":"2026-04-30T17:21:09","name":"[PULL,03/58] target/i386/tcg: simplify decoding of 0F 38 F0...FF","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"951b45eb7bbe2aa2e438aee46bdcc12414cfb77d","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/?format=json","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430172204.1006673-4-pbonzini@redhat.com/mbox/","series":[{"id":502347,"url":"http://patchwork.ozlabs.org/api/series/502347/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502347","date":"2026-04-30T17:21:16","name":"[PULL,01/58] pythondeps: bump to meson 1.11.1","version":1,"mbox":"http://patchwork.ozlabs.org/series/502347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231417/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231417/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=MrLFw1ov;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=google header.b=d4J/0HbB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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In reality, this is\njust the CRC32 instruction (chosen by 0xF2) plus a data size override\nprefix. All other instruction in the range that use the 0xF2 prefix\nare VEX-encoded and therefore they do not support multiple prefixes.\nBecause of this, it is possible to handle the four prefixes normally\nusing decode_by_prefix; the 0x66 0xF2 combination for CRC32 is handled\nnaturally by the \"v\" operand size.\n\nSigned-off-by: Paolo Bonzini \n---\n target/i386/tcg/decode-new.c.inc | 21 +++------------------\n 1 file changed, 3 insertions(+), 18 deletions(-)","diff":"diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc\nindex c8b5bd6ad26..ac181308ca4 100644\n--- a/target/i386/tcg/decode-new.c.inc\n+++ b/target/i386/tcg/decode-new.c.inc\n@@ -873,8 +873,8 @@ static const X86OpEntry opcodes_0F38_00toEF[240] = {\n [0xef] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),\n };\n \n-/* five rows for no prefix, 66, F3, F2, 66+F2 */\n-static const X86OpEntry opcodes_0F38_F0toFF[16][5] = {\n+/* four rows for no prefix, 66, F3, F2 (including 66+F2 operand size override) */\n+static const X86OpEntry opcodes_0F38_F0toFF[16][4] = {\n /*\n * MOVBE and CRC32 are incorrectly listed as always doing 32-bit operation\n * without prefix and 16-bit operation with 0x66.\n@@ -884,49 +884,42 @@ static const X86OpEntry opcodes_0F38_F0toFF[16][5] = {\n X86_OP_ENTRYwr(MOVBE, G,v, M,v, cpuid(MOVBE)),\n {},\n X86_OP_ENTRY2(CRC32, G,d, E,b, cpuid(SSE42)),\n- X86_OP_ENTRY2(CRC32, G,d, E,b, cpuid(SSE42)),\n },\n [1] = {\n X86_OP_ENTRYwr(MOVBE, M,v, G,v, cpuid(MOVBE)),\n X86_OP_ENTRYwr(MOVBE, M,v, G,v, cpuid(MOVBE)),\n {},\n X86_OP_ENTRY2(CRC32, G,d, E,v, cpuid(SSE42)),\n- X86_OP_ENTRY2(CRC32, G,d, E,v, cpuid(SSE42)),\n },\n [2] = {\n X86_OP_ENTRY3(ANDN, G,y, B,y, E,y, vex13 cpuid(BMI1)),\n {},\n {},\n {},\n- {},\n },\n [3] = {\n X86_OP_GROUP3(group17, B,y, None,None, E,y, vex13 cpuid(BMI1)),\n {},\n {},\n {},\n- {},\n },\n [5] = {\n X86_OP_ENTRY3(BZHI, G,y, E,y, B,y, vex13 cpuid(BMI1)),\n {},\n X86_OP_ENTRY3(PEXT, G,y, B,y, E,y, vex13 zextT0 cpuid(BMI2)),\n X86_OP_ENTRY3(PDEP, G,y, B,y, E,y, vex13 zextT0 cpuid(BMI2)),\n- {},\n },\n [6] = {\n {},\n X86_OP_ENTRY2(ADCX, G,y, E,y, cpuid(ADX)),\n X86_OP_ENTRY2(ADOX, G,y, E,y, cpuid(ADX)),\n X86_OP_ENTRY3(MULX, /* B,y, */ G,y, E,y, 2,y, vex13 cpuid(BMI2)),\n- {},\n },\n [7] = {\n X86_OP_ENTRY3(BEXTR, G,y, E,y, B,y, vex13 zextT0 cpuid(BMI1)),\n X86_OP_ENTRY3(SHLX, G,y, E,y, B,y, vex13 cpuid(BMI1)),\n X86_OP_ENTRY3(SARX, G,y, E,y, B,y, vex13 sextT0 cpuid(BMI1)),\n X86_OP_ENTRY3(SHRX, G,y, E,y, B,y, vex13 zextT0 cpuid(BMI1)),\n- {},\n },\n };\n \n@@ -936,15 +929,7 @@ static void decode_0F38(DisasContext *s, CPUX86State *env, X86OpEntry *entry, ui\n if (*b < 0xf0) {\n *entry = opcodes_0F38_00toEF[*b];\n } else {\n- int row = 0;\n- if (s->prefix & PREFIX_REPZ) {\n- /* The REPZ (F3) prefix has priority over 66 */\n- row = 2;\n- } else {\n- row += s->prefix & PREFIX_REPNZ ? 3 : 0;\n- row += s->prefix & PREFIX_DATA ? 1 : 0;\n- }\n- *entry = opcodes_0F38_F0toFF[*b & 15][row];\n+ *entry = *decode_by_prefix(s, opcodes_0F38_F0toFF[*b & 15]);\n }\n }\n \n","prefixes":["PULL","03/58"]}