{"id":2231319,"url":"http://patchwork.ozlabs.org/api/patches/2231319/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/93501e9a-3bc8-49d2-bc82-03271aaa75fc@redhat.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<93501e9a-3bc8-49d2-bc82-03271aaa75fc@redhat.com>","list_archive_url":null,"date":"2026-04-30T15:41:30","name":"[pushed,IRA] : Process operand NO_REGS class for reg cost calculation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"84b34aaa38f6cf1ac5977c30531489234478dfc6","submitter":{"id":4455,"url":"http://patchwork.ozlabs.org/api/people/4455/?format=json","name":"Vladimir Makarov","email":"vmakarov@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/93501e9a-3bc8-49d2-bc82-03271aaa75fc@redhat.com/mbox/","series":[{"id":502328,"url":"http://patchwork.ozlabs.org/api/series/502328/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=502328","date":"2026-04-30T15:41:30","name":"[pushed,IRA] : Process operand NO_REGS class for reg cost calculation","version":1,"mbox":"http://patchwork.ozlabs.org/series/502328/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231319/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231319/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=CjxrDZGc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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boundary=\"------------uJkaOAiwni9YtOKOvWy41nYz\"","Content-Language":"en-US","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"The reason for the patch is in its commit message.\n\nThe patch was successfully bootstrapped and tested on \nx86-64,aarch64,ppc64le.","diff":"commit 80a89027d9859c23fdc82200ca05dfffd147281b\nAuthor: Vladimir N. Makarov \nDate: Thu Apr 30 09:02:51 2026 -0400\n\n [IRA]: Process operand NO_REGS class for reg cost calculation\n \n In record_reg_classes there is no special processing of case op_class ==\n NO_REGS. It can result in very high cost of the insn alternative cost.\n The patch fixes this and can change generated code.\n \n gcc/ChangeLog:\n \n * ira-costs.cc (record_reg_classes): Process correctly case\n op_class == NO_REGS.\n\ndiff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc\nindex 3a42837a995..d2ea0cc49e3 100644\n--- a/gcc/ira-costs.cc\n+++ b/gcc/ira-costs.cc\n@@ -722,13 +722,21 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,\n \t\t\t}\n \t\t }\n \n-\t\t /* If the alternative actually allows memory, make\n-\t\t things a bit cheaper since we won't need an extra\n-\t\t insn to load it. */\n-\t\t pp->mem_cost\n-\t\t = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0)\n-\t\t + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0)\n-\t\t - allows_mem[i]) * frequency;\n+\t\t if (op_class == NO_REGS)\n+\t\t /* Although we don't need insn to reload from\n+\t\t memory, still accessing memory is usually more\n+\t\t expensive than a register. */\n+\t\t pp->mem_cost = frequency;\n+\t\t else\n+\t\t /* If the alternative actually allows memory, make\n+\t\t things a bit cheaper since we won't need an\n+\t\t extra insn to load it. */\n+\t\t pp->mem_cost\n+\t\t = ((out_p\n+\t\t\t ? ira_memory_move_cost[mode][op_class][0] : 0)\n+\t\t\t + (in_p\n+\t\t\t ? ira_memory_move_cost[mode][op_class][1] : 0)\n+\t\t\t - allows_mem[i]) * frequency;\n \n \t\t /* If we have assigned a class to this allocno in\n \t\t our first pass, add a cost to this alternative\n@@ -739,16 +747,28 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,\n \t\t enum reg_class pref_class = pref[COST_INDEX (REGNO (op))];\n \n \t\t if (pref_class == NO_REGS)\n+\t\t\t{\n+\t\t\t if (op_class != NO_REGS)\n+\t\t\t alt_cost\n+\t\t\t += ((out_p\n+\t\t\t\t ? ira_memory_move_cost[mode][op_class][0]\n+\t\t\t\t : 0)\n+\t\t\t\t + (in_p\n+\t\t\t\t ? ira_memory_move_cost[mode][op_class][1]\n+\t\t\t\t : 0));\n+\t\t\t}\n+\t\t else if (op_class == NO_REGS)\n \t\t\talt_cost\n \t\t\t += ((out_p\n-\t\t\t ? ira_memory_move_cost[mode][op_class][0] : 0)\n+\t\t\t ? ira_memory_move_cost[mode][pref_class][0]\n+\t\t\t : 0)\n \t\t\t + (in_p\n-\t\t\t\t ? ira_memory_move_cost[mode][op_class][1]\n+\t\t\t\t ? ira_memory_move_cost[mode][pref_class][1]\n \t\t\t\t : 0));\n \t\t else if (ira_reg_class_intersect\n \t\t\t [pref_class][op_class] == NO_REGS)\n-\t\t\talt_cost\n-\t\t\t += ira_register_move_cost[mode][pref_class][op_class];\n+\t\t\talt_cost += (ira_register_move_cost\n+\t\t\t\t [mode][pref_class][op_class]);\n \t\t }\n \t\t if (REGNO (ops[i]) != REGNO (ops[j])\n \t\t && ! find_reg_note (insn, REG_DEAD, op))\n","prefixes":["pushed","IRA"]}