{"id":2231223,"url":"http://patchwork.ozlabs.org/api/patches/2231223/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/4885b1983ec158ed98e727091be38f7de104108e.1777550623.git.michal.simek@amd.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<4885b1983ec158ed98e727091be38f7de104108e.1777550623.git.michal.simek@amd.com>","list_archive_url":null,"date":"2026-04-30T12:03:47","name":"[4/4] xilinx: mbv: Disable arch-specific memory functions in SPL","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a116bfe7c2003b98f9a979d85649ff5383029d97","submitter":{"id":84271,"url":"http://patchwork.ozlabs.org/api/people/84271/?format=json","name":"Michal Simek","email":"michal.simek@amd.com"},"delegate":{"id":1692,"url":"http://patchwork.ozlabs.org/api/users/1692/?format=json","username":"monstr","first_name":"Michal","last_name":"Simek","email":"monstr@monstr.eu"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/4885b1983ec158ed98e727091be38f7de104108e.1777550623.git.michal.simek@amd.com/mbox/","series":[{"id":502287,"url":"http://patchwork.ozlabs.org/api/series/502287/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=502287","date":"2026-04-30T12:03:45","name":"[1/4] xilinx: mbv: Disable AVAILABLE_HARTS","version":1,"mbox":"http://patchwork.ozlabs.org/series/502287/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231223/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231223/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=ugjJT421;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Ip=[165.204.84.17];\n Helo=[satlexmb08.amd.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n SJ1PEPF0000231D.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"MW3PR12MB4474","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Disable CONFIG_SPL_USE_ARCH_MEMCPY, CONFIG_SPL_USE_ARCH_MEMMOVE, and\nCONFIG_SPL_USE_ARCH_MEMSET to use generic C implementations instead\nof RISC-V assembly versions. The generic implementations are smaller\nfor SPL's constrained code size requirements.\n\n spl/u-boot-spl: all -446 text -446\n\nSigned-off-by: Michal Simek \n---\n\n configs/xilinx_mbv32_defconfig | 3 +++\n 1 file changed, 3 insertions(+)","diff":"diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig\nindex 9538769f17f8..4f017296f0be 100644\n--- a/configs/xilinx_mbv32_defconfig\n+++ b/configs/xilinx_mbv32_defconfig\n@@ -1,4 +1,7 @@\n CONFIG_RISCV=y\n+# CONFIG_SPL_USE_ARCH_MEMCPY is not set\n+# CONFIG_SPL_USE_ARCH_MEMMOVE is not set\n+# CONFIG_SPL_USE_ARCH_MEMSET is not set\n CONFIG_SYS_MALLOC_LEN=0xe00000\n CONFIG_NR_DRAM_BANKS=1\n CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y\n","prefixes":["4/4"]}