{"id":2231221,"url":"http://patchwork.ozlabs.org/api/patches/2231221/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/96dcbd196206f48aa4552624b562124c11cafbce.1777550623.git.michal.simek@amd.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<96dcbd196206f48aa4552624b562124c11cafbce.1777550623.git.michal.simek@amd.com>","list_archive_url":null,"date":"2026-04-30T12:03:46","name":"[3/4] xilinx: mbv: Disable CPU driver in SPL","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2619a6c0fe7dd9e5d318cd1cba0074b456d6a8a8","submitter":{"id":84271,"url":"http://patchwork.ozlabs.org/api/people/84271/?format=json","name":"Michal Simek","email":"michal.simek@amd.com"},"delegate":{"id":1692,"url":"http://patchwork.ozlabs.org/api/users/1692/?format=json","username":"monstr","first_name":"Michal","last_name":"Simek","email":"monstr@monstr.eu"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/96dcbd196206f48aa4552624b562124c11cafbce.1777550623.git.michal.simek@amd.com/mbox/","series":[{"id":502287,"url":"http://patchwork.ozlabs.org/api/series/502287/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=502287","date":"2026-04-30T12:03:45","name":"[1/4] xilinx: mbv: Disable AVAILABLE_HARTS","version":1,"mbox":"http://patchwork.ozlabs.org/series/502287/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231221/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231221/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=MWo7v5w6;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Ip=[165.204.84.17];\n Helo=[satlexmb08.amd.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n CH3PEPF00000014.namprd21.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SA1PR12MB9513","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Disable CONFIG_SPL_CPU to remove the CPU driver from SPL. The CPU\ndriver provides runtime CPU information and enumeration which is not\nneeded during the early SPL boot phase, saving significant code space.\n\n spl/u-boot-spl: all -922 data -208 rodata -100 text -614\n\nSigned-off-by: Michal Simek \n---\n\n configs/xilinx_mbv32_defconfig | 1 +\n 1 file changed, 1 insertion(+)","diff":"diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig\nindex 9d0111fe8e53..9538769f17f8 100644\n--- a/configs/xilinx_mbv32_defconfig\n+++ b/configs/xilinx_mbv32_defconfig\n@@ -36,6 +36,7 @@ CONFIG_SPL_SYS_MALLOC=y\n CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y\n CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80000000\n CONFIG_SPL_SYS_MALLOC_SIZE=0x200000\n+# CONFIG_SPL_CPU is not set\n # CONFIG_CMD_MII is not set\n CONFIG_CMD_SNTP=y\n CONFIG_CMD_TIMER=y\n","prefixes":["3/4"]}