{"id":2230883,"url":"http://patchwork.ozlabs.org/api/patches/2230883/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430071315.354333-16-zhenzhong.duan@intel.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430071315.354333-16-zhenzhong.duan@intel.com>","list_archive_url":null,"date":"2026-04-30T07:13:11","name":"[v4,15/15] intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED and VIOMMU_FLAG_WANT_PASID_ATTACH","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8aae02c26a8d4fad813316d69872968403f30dd0","submitter":{"id":81636,"url":"http://patchwork.ozlabs.org/api/people/81636/?format=json","name":"Duan, Zhenzhong","email":"zhenzhong.duan@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430071315.354333-16-zhenzhong.duan@intel.com/mbox/","series":[{"id":502222,"url":"http://patchwork.ozlabs.org/api/series/502222/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502222","date":"2026-04-30T07:12:57","name":"intel_iommu: Enable PASID support for passthrough device","version":4,"mbox":"http://patchwork.ozlabs.org/series/502222/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230883/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230883/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=HG+KaIYf;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=\"81051694\"","E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"81051694\"","E=Sophos;i=\"6.23,207,1770624000\"; d=\"scan'208\";a=\"234771613\""],"X-ExtLoop1":"1","From":"Zhenzhong Duan <zhenzhong.duan@intel.com>","To":"qemu-devel@nongnu.org","Cc":"alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>","Subject":"[PATCH v4 15/15] intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED\n and VIOMMU_FLAG_WANT_PASID_ATTACH","Date":"Thu, 30 Apr 2026 03:13:11 -0400","Message-ID":"<20260430071315.354333-16-zhenzhong.duan@intel.com>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260430071315.354333-1-zhenzhong.duan@intel.com>","References":"<20260430071315.354333-1-zhenzhong.duan@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=192.198.163.13;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com","X-Spam_score_int":"-43","X-Spam_score":"-4.4","X-Spam_bar":"----","X-Spam_report":"(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"VFIO device will check flag VIOMMU_FLAG_PASID_SUPPORTED and expose PASID\ncapability, also check VIOMMU_FLAG_WANT_PASID_ATTACH to enable pasid\nattachment, without those guest could not enable PASID of this device even\nif vIOMMU's pasid is configured.\n\nThis is the final knob to enable PASID.\n\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\nTested-by: Xudong Hao <xudong.hao@intel.com>\n---\n hw/i386/intel_iommu.c | 4 ++++\n 1 file changed, 4 insertions(+)","diff":"diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c\nindex d6eb3ac94b..8a5d5e4b66 100644\n--- a/hw/i386/intel_iommu.c\n+++ b/hw/i386/intel_iommu.c\n@@ -4827,6 +4827,10 @@ static uint64_t vtd_get_viommu_flags(void *opaque)\n                 VIOMMU_FLAG_WANT_NESTING_DIRTY_TRACKING;\n     }\n \n+    if (s->pasid) {\n+        flags |= VIOMMU_FLAG_PASID_SUPPORTED | VIOMMU_FLAG_WANT_PASID_ATTACH;\n+    }\n+\n     return flags;\n }\n \n","prefixes":["v4","15/15"]}