{"id":2230728,"url":"http://patchwork.ozlabs.org/api/patches/2230728/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430002046.59739-40-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430002046.59739-40-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-04-30T00:20:38","name":"[v3,39/47] target/arm: Update ID_AA64SMFR0_EL1 fields to ARM M.b","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"377c082f9e2c1a7ee67b5ef49c664b3c2d449243","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430002046.59739-40-richard.henderson@linaro.org/mbox/","series":[{"id":502175,"url":"http://patchwork.ozlabs.org/api/series/502175/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502175","date":"2026-04-30T00:20:06","name":"target/arm: Implement FEAT_FP8","version":3,"mbox":"http://patchwork.ozlabs.org/series/502175/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230728/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230728/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=vJTQAyh9;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZdW74wFz1yJr\n\tfor ; Thu, 30 Apr 2026 10:23:11 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wIFB9-0000aC-LU; Wed, 29 Apr 2026 20:22:55 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wIFAb-0008Ba-4K\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:22:27 -0400","from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wIFAY-0006dA-Hf\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:22:20 -0400","by mail-pg1-x52b.google.com with SMTP id\n 41be03b00d2f7-c6dd5b01e14so95182a12.0\n for ; Wed, 29 Apr 2026 17:22:18 -0700 (PDT)","from stoup.. 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helo=mail-pg1-x52b.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n target/arm/cpu-features.h | 11 +++++++++++\n 1 file changed, 11 insertions(+)","diff":"diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h\nindex 03fd860406..15e9821ce5 100644\n--- a/target/arm/cpu-features.h\n+++ b/target/arm/cpu-features.h\n@@ -388,17 +388,28 @@ FIELD(ID_AA64ZFR0, F16MM, 48, 4)\n FIELD(ID_AA64ZFR0, F32MM, 52, 4)\n FIELD(ID_AA64ZFR0, F64MM, 56, 4)\n \n+FIELD(ID_AA64SMFR0, SMOP4, 0, 1)\n+FIELD(ID_AA64SMFR0, STMOP, 16, 1)\n+FIELD(ID_AA64SMFR0, SFEXPA, 23, 1)\n+FIELD(ID_AA64SMFR0, AES, 24, 1)\n+FIELD(ID_AA64SMFR0, SBITPERM, 25, 1)\n+FIELD(ID_AA64SMFR0, SF8DP2, 28, 1)\n+FIELD(ID_AA64SMFR0, SF8DP4, 29, 1)\n+FIELD(ID_AA64SMFR0, SF8FMA, 30, 1)\n FIELD(ID_AA64SMFR0, F32F32, 32, 1)\n FIELD(ID_AA64SMFR0, BI32I32, 33, 1)\n FIELD(ID_AA64SMFR0, B16F32, 34, 1)\n FIELD(ID_AA64SMFR0, F16F32, 35, 1)\n FIELD(ID_AA64SMFR0, I8I32, 36, 4)\n+FIELD(ID_AA64SMFR0, F8F32, 40, 1)\n+FIELD(ID_AA64SMFR0, F8F16, 41, 1)\n FIELD(ID_AA64SMFR0, F16F16, 42, 1)\n FIELD(ID_AA64SMFR0, B16B16, 43, 1)\n FIELD(ID_AA64SMFR0, I16I32, 44, 4)\n FIELD(ID_AA64SMFR0, F64F64, 48, 1)\n FIELD(ID_AA64SMFR0, I16I64, 52, 4)\n FIELD(ID_AA64SMFR0, SMEVER, 56, 4)\n+FIELD(ID_AA64SMFR0, LUTv2, 60, 1)\n FIELD(ID_AA64SMFR0, FA64, 63, 1)\n \n FIELD(ID_AA64FPFR0, F8E5M2, 0, 1)\n","prefixes":["v3","39/47"]}