{"id":2230693,"url":"http://patchwork.ozlabs.org/api/patches/2230693/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-41-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430000524.56046-41-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-04-30T00:05:23","name":"[v2,40/40] fpu: Introduce exp_scalbn","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"07fa93049a0caed91d1168b3d3685846d2e34b43","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-41-richard.henderson@linaro.org/mbox/","series":[{"id":502170,"url":"http://patchwork.ozlabs.org/api/series/502170/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502170","date":"2026-04-30T00:04:48","name":"fpu: Export some internals for targets","version":2,"mbox":"http://patchwork.ozlabs.org/series/502170/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230693/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230693/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ztFFbXer;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZLy04B6z1yHv\n\tfor ; Thu, 30 Apr 2026 10:10:32 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wIEyp-0007n2-Q4; Wed, 29 Apr 2026 20:10:11 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wIEyk-0007Cf-Oh\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:10:07 -0400","from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wIEyi-00038v-Qq\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:10:06 -0400","by mail-pf1-x430.google.com with SMTP id\n d2e1a72fcca58-82fa8d6425bso180182b3a.0\n for ; Wed, 29 Apr 2026 17:10:04 -0700 (PDT)","from stoup.. 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Use it in partsN(scalbn)\nand partsN(round_to_int_normal).\n\nSigned-off-by: Richard Henderson \n---\n fpu/softfloat.c | 17 +++++++++++++++++\n fpu/softfloat-parts.c.inc | 5 ++---\n 2 files changed, 19 insertions(+), 3 deletions(-)","diff":"diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 6a14c5d639..a6ab3ee0f8 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -601,6 +601,23 @@ static float128 QEMU_FLATTEN float128_pack_raw(const FloatParts128 *p)\n *----------------------------------------------------------------------------*/\n #include \"softfloat-specialize.c.inc\"\n \n+static int32_t exp_scalbn(int32_t exp, int32_t scale)\n+{\n+ /*\n+ * Catch chains of scaling which lose information.\n+ * In particular, if the exponent has been saturated,\n+ * do not allow it to become unsaturated.\n+ */\n+ if (unlikely(exp == INT32_MAX)) {\n+ assert(scale >= 0);\n+ } else if (unlikely(exp == INT32_MIN)) {\n+ assert(scale <= 0);\n+ } else {\n+ exp = sadd32_saturate(exp, scale);\n+ }\n+ return exp;\n+}\n+\n /*\n * Helper functions for softfloat-parts.c.inc, per-size operations.\n */\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex c5a828eb90..789a41d24e 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -1107,8 +1107,7 @@ static bool partsN(round_to_int_normal)(FloatPartsN *a, FloatRoundMode rmode,\n uint64_t frac_lsb, frac_lsbm1, rnd_even_mask, rnd_mask, inc;\n int shift_adj;\n \n- scale = MIN(MAX(scale, -0x10000), 0x10000);\n- a->exp += scale;\n+ a->exp = exp_scalbn(a->exp, scale);\n \n if (a->exp < 0) {\n bool one;\n@@ -1632,7 +1631,7 @@ FloatPartsN partsN(scalbn)(const FloatPartsN *a, int n, float_status *s)\n case float_class_normal:\n {\n FloatPartsN r = *a;\n- r.exp += MIN(MAX(n, -0x10000), 0x10000);\n+ r.exp = exp_scalbn(r.exp, n);\n return r;\n }\n default:\n","prefixes":["v2","40/40"]}