{"id":2230677,"url":"http://patchwork.ozlabs.org/api/patches/2230677/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-19-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430000524.56046-19-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-04-30T00:05:01","name":"[v2,18/40] fpu: Return struct from parts{64,128}_round_to_int","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4e2934a61474259f9df67b7fe6b3cb4e416fdbeb","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-19-richard.henderson@linaro.org/mbox/","series":[{"id":502170,"url":"http://patchwork.ozlabs.org/api/series/502170/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502170","date":"2026-04-30T00:04:48","name":"fpu: Export some internals for targets","version":2,"mbox":"http://patchwork.ozlabs.org/series/502170/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230677/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230677/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=GCmEJrR5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZHc2W5Nz1yJr\n\tfor ; Thu, 30 Apr 2026 10:07:40 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wIEv0-0007LT-Ul; Wed, 29 Apr 2026 20:06:15 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wIEuy-0007CK-U3\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:06:13 -0400","from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wIEux-0001oe-62\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:06:12 -0400","by mail-pf1-x436.google.com with SMTP id\n d2e1a72fcca58-82fbf5d4dc2so266168b3a.1\n for ; Wed, 29 Apr 2026 17:06:10 -0700 (PDT)","from stoup.. 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","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"At the same time, export.\n\nSigned-off-by: Richard Henderson \n---\n include/fpu/softfloat-parts.h | 9 +++++++++\n fpu/softfloat.c | 19 ++++++++++++-------\n fpu/softfloat-parts.c.inc | 17 ++++++++++-------\n 3 files changed, 31 insertions(+), 14 deletions(-)","diff":"diff --git a/include/fpu/softfloat-parts.h b/include/fpu/softfloat-parts.h\nindex 44e0cb7d05..1329bc4d2f 100644\n--- a/include/fpu/softfloat-parts.h\n+++ b/include/fpu/softfloat-parts.h\n@@ -172,4 +172,13 @@ FloatParts64 parts64_div(const FloatParts64 *a, const FloatParts64 *b,\n FloatParts128 parts128_div(const FloatParts128 *a, const FloatParts128 *b,\n float_status *s);\n \n+FloatParts64 parts64_round_to_int(const FloatParts64 *a,\n+ FloatRoundMode rmode,\n+ int scale, float_status *s,\n+ const FloatFmt *fmt);\n+FloatParts128 parts128_round_to_int(const FloatParts128 *a,\n+ FloatRoundMode rmode,\n+ int scale, float_status *s,\n+ const FloatFmt *fmt);\n+\n #endif\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 6d69b61c7f..b71bd49483 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2738,7 +2738,8 @@ float16 float16_round_to_int(float16 a, float_status *s)\n {\n FloatParts64 p = float16_unpack_canonical(a, s);\n \n- parts64_round_to_int(&p, s->float_rounding_mode, 0, s, &float16_params);\n+ p = parts64_round_to_int(&p, s->float_rounding_mode, 0, s,\n+ &float16_params);\n return float16_round_pack_canonical(&p, s);\n }\n \n@@ -2746,7 +2747,8 @@ float32 float32_round_to_int(float32 a, float_status *s)\n {\n FloatParts64 p = float32_unpack_canonical(a, s);\n \n- parts64_round_to_int(&p, s->float_rounding_mode, 0, s, &float32_params);\n+ p = parts64_round_to_int(&p, s->float_rounding_mode, 0, s,\n+ &float32_params);\n return float32_round_pack_canonical(&p, s);\n }\n \n@@ -2754,7 +2756,8 @@ float64 float64_round_to_int(float64 a, float_status *s)\n {\n FloatParts64 p = float64_unpack_canonical(a, s);\n \n- parts64_round_to_int(&p, s->float_rounding_mode, 0, s, &float64_params);\n+ p = parts64_round_to_int(&p, s->float_rounding_mode, 0, s,\n+ &float64_params);\n return float64_round_pack_canonical(&p, s);\n }\n \n@@ -2762,7 +2765,8 @@ bfloat16 bfloat16_round_to_int(bfloat16 a, float_status *s)\n {\n FloatParts64 p = bfloat16_unpack_canonical(a, s);\n \n- parts64_round_to_int(&p, s->float_rounding_mode, 0, s, &bfloat16_params);\n+ p = parts64_round_to_int(&p, s->float_rounding_mode, 0, s,\n+ &bfloat16_params);\n return bfloat16_round_pack_canonical(&p, s);\n }\n \n@@ -2770,7 +2774,8 @@ float128 float128_round_to_int(float128 a, float_status *s)\n {\n FloatParts128 p = float128_unpack_canonical(a, s);\n \n- parts128_round_to_int(&p, s->float_rounding_mode, 0, s, &float128_params);\n+ p = parts128_round_to_int(&p, s->float_rounding_mode, 0, s,\n+ &float128_params);\n return float128_round_pack_canonical(&p, s);\n }\n \n@@ -2782,8 +2787,8 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status)\n return floatx80_default_nan(status);\n }\n \n- parts128_round_to_int(&p, status->float_rounding_mode, 0, status,\n- &floatx80_params[status->floatx80_rounding_precision]);\n+ p = parts128_round_to_int(&p, status->float_rounding_mode, 0, status,\n+ &floatx80_params[status->floatx80_rounding_precision]);\n return floatx80_round_pack_canonical(&p, status);\n }\n \ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 1634160728..1cd0df4159 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -1255,24 +1255,27 @@ static bool partsN(round_to_int_normal)(FloatPartsN *a, FloatRoundMode rmode,\n return true;\n }\n \n-static void partsN(round_to_int)(FloatPartsN *a, FloatRoundMode rmode,\n+FloatPartsN partsN(round_to_int)(const FloatPartsN *a,\n+ FloatRoundMode rmode,\n int scale, float_status *s,\n const FloatFmt *fmt)\n {\n switch (a->cls) {\n case float_class_qnan:\n case float_class_snan:\n- *a = partsN(return_nan)(a, s);\n- break;\n+ return partsN(return_nan)(a, s);\n case float_class_zero:\n case float_class_inf:\n- break;\n+ return *a;\n case float_class_normal:\n case float_class_denormal:\n- if (partsN(round_to_int_normal)(a, rmode, scale, fmt->frac_size)) {\n- float_raise(float_flag_inexact, s);\n+ {\n+ FloatPartsN r = *a;\n+ if (partsN(round_to_int_normal)(&r, rmode, scale, fmt->frac_size)) {\n+ float_raise(float_flag_inexact, s);\n+ }\n+ return r;\n }\n- break;\n default:\n g_assert_not_reached();\n }\n","prefixes":["v2","18/40"]}