{"id":2230676,"url":"http://patchwork.ozlabs.org/api/patches/2230676/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-22-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430000524.56046-22-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-04-30T00:05:04","name":"[v2,21/40] fpu: Introduce parts64_round_to_fmt","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8afe1cd3aab2df85a74365e677293b66fecbabf1","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260430000524.56046-22-richard.henderson@linaro.org/mbox/","series":[{"id":502170,"url":"http://patchwork.ozlabs.org/api/series/502170/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502170","date":"2026-04-30T00:04:48","name":"fpu: Export some internals for targets","version":2,"mbox":"http://patchwork.ozlabs.org/series/502170/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230676/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230676/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=NU5NACyd;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5ZHc10C4z1yHZ\n\tfor ; Thu, 30 Apr 2026 10:07:40 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wIEvR-000807-LB; Wed, 29 Apr 2026 20:06:49 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wIEv6-0007ij-VS\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:06:24 -0400","from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wIEv4-0001pf-34\n for qemu-devel@nongnu.org; Wed, 29 Apr 2026 20:06:19 -0400","by mail-pf1-x42c.google.com with SMTP id\n d2e1a72fcca58-82fbf5d4dc2so266230b3a.1\n for ; Wed, 29 Apr 2026 17:06:17 -0700 (PDT)","from stoup.. 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helo=mail-pf1-x42c.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n include/fpu/softfloat-parts.h | 3 +++\n fpu/softfloat.c | 22 +++++++++++++++++++---\n 2 files changed, 22 insertions(+), 3 deletions(-)","diff":"diff --git a/include/fpu/softfloat-parts.h b/include/fpu/softfloat-parts.h\nindex 8c3a94bbbc..1876264d43 100644\n--- a/include/fpu/softfloat-parts.h\n+++ b/include/fpu/softfloat-parts.h\n@@ -196,4 +196,7 @@ FloatParts128 parts128_round_to_int(const FloatParts128 *a,\n int scale, float_status *s,\n const FloatFmt *fmt);\n \n+FloatParts64 parts64_round_to_fmt(const FloatParts64 *p, float_status *s,\n+ const FloatFmt *fmt);\n+\n #endif\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex e42782c656..4efafbf05a 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -1396,6 +1396,24 @@ float64 float64_round_pack_canonical(FloatParts64 *p, float_status *s)\n return pack_raw64(p, &float64_params);\n }\n \n+/*\n+ * Round to Fmt while remaining canonicalized.\n+ */\n+FloatParts64 parts64_round_to_fmt(const FloatParts64 *p, float_status *s,\n+ const FloatFmt *fmt)\n+{\n+ FloatParts64 r = *p;\n+\n+ parts64_uncanon(&r, s, fmt, false);\n+ /*\n+ * We normally expect uncanon to be followed by pack_raw,\n+ * so we don't actually crop the bits. Do so now.\n+ */\n+ r.frac &= MAKE_64BIT_MASK(0, fmt->frac_size);\n+ parts64_canonicalize(&r, s, fmt);\n+ return r;\n+}\n+\n static float64 float64r32_pack_raw(FloatParts64 *p)\n {\n /*\n@@ -5175,10 +5193,8 @@ static void parts_s390_divide_to_integer(FloatParts64 *a, FloatParts64 *b,\n /* Round remainder to the target format */\n *r = *r_precise;\n status->float_exception_flags = 0;\n- parts64_uncanon(r, status, fmt, false);\n+ *r = parts64_round_to_fmt(r, status, fmt);\n r_flags = status->float_exception_flags;\n- r->frac &= (1ULL << fmt->frac_size) - 1;\n- parts64_canonicalize(r, status, fmt);\n \n /* POp table \"Results: DIVIDE TO INTEGER (Part 2 of 2)\" */\n if (is_q_smallish) {\n","prefixes":["v2","21/40"]}